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Hieu Nguyenjhedberg
Hieu Nguyen
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jhedberg
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drivers: pwm: Add PWM support for Renesas RZ/T2M, N2L, V2L
Add PWM driver support for Renesas RZ/T2M, N2L, V2L Signed-off-by: Hieu Nguyen <[email protected]> Signed-off-by: Tien Nguyen <[email protected]>
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‎drivers/pwm/pwm_renesas_rz_gpt.c

Lines changed: 68 additions & 46 deletions
Original file line numberDiff line numberDiff line change
@@ -1,5 +1,5 @@
11
/*
2-
* Copyright (c) 2024 Renesas Electronics Corporation
2+
* Copyright (c) 2024-2025 Renesas Electronics Corporation
33
*
44
* SPDX-License-Identifier: Apache-2.0
55
*/
@@ -25,6 +25,13 @@ LOG_MODULE_REGISTER(pwm_renesas_rz_gpt, CONFIG_PWM_LOG_LEVEL);
2525
#define CAPTURE_BOTH_MODE_FIRST_EVENT_IS_CAPTURE_PULSE 1
2626
#define CAPTURE_BOTH_MODE_SECOND_EVENT_IS_CAPTURE_PERIOD 2
2727

28+
#define RZ_GPT_GTIOR_OAE_Msk (0x100UL)
29+
#define RZ_GPT_GTIOR_OADFLT_Pos (6UL)
30+
#define RZ_GPT_GTIOR_GTIOA_Pos (0UL)
31+
#define RZ_GPT_GTIOR_GTIOB_Pos (16UL)
32+
#define RZ_GPT_GTIOR_NFAEN_Pos (13UL)
33+
#define RZ_GPT_GTIOR_NFBEN_Pos (29UL)
34+
2835
struct pwm_rz_gpt_capture_data {
2936
pwm_capture_callback_handler_t callback;
3037
void *user_data;
@@ -53,8 +60,8 @@ struct pwm_rz_gpt_config {
5360

5461
static uint32_t pwm_rz_gpt_gtior_calculate(gpt_pin_level_t const stop_level)
5562
{
56-
/* The stop level is used as both the initial level and the stop level. */
57-
uint32_t gtior = R_GPT0_GTIOR_OAE_Msk | ((uint32_t)stop_level << R_GPT0_GTIOR_OADFLT_Pos) |
63+
/* The stop level is used as both the initial level and the stop level */
64+
uint32_t gtior = RZ_GPT_GTIOR_OAE_Msk | ((uint32_t)stop_level << RZ_GPT_GTIOR_OADFLT_Pos) |
5865
((uint32_t)stop_level << GPT_PRV_GTIOR_INITIAL_LEVEL_BIT);
5966

6067
uint32_t gtion = GPT_PRV_GTIO_LOW_COMPARE_MATCH_HIGH_CYCLE_END;
@@ -69,37 +76,28 @@ static int pwm_rz_gpt_apply_gtior_config(gpt_instance_ctrl_t *const p_ctrl,
6976
timer_cfg_t const *const p_cfg)
7077
{
7178
gpt_extended_cfg_t *p_extend = (gpt_extended_cfg_t *)p_cfg->p_extend;
72-
uint32_t gtior = p_extend->gtior_setting.gtior;
79+
uint32_t gtior = 0;
7380

7481
#if GPT_CFG_OUTPUT_SUPPORT_ENABLE
75-
/* Check if custom GTIOR settings are provided. */
76-
if (p_extend->gtior_setting.gtior == 0) {
77-
/* If custom GTIOR settings are not provided, calculate GTIOR. */
78-
if (p_extend->gtioca.output_enabled) {
79-
uint32_t gtioca_gtior =
80-
pwm_rz_gpt_gtior_calculate(p_extend->gtioca.stop_level);
81-
gtior |= gtioca_gtior << R_GPT0_GTIOR_GTIOA_Pos;
82-
}
82+
/* Calculate GTIOR */
83+
if (p_extend->gtioca.output_enabled) {
84+
uint32_t gtioca_gtior = pwm_rz_gpt_gtior_calculate(p_extend->gtioca.stop_level);
8385

84-
if (p_extend->gtiocb.output_enabled) {
85-
uint32_t gtiocb_gtior =
86-
pwm_rz_gpt_gtior_calculate(p_extend->gtiocb.stop_level);
87-
gtior |= gtiocb_gtior << R_GPT0_GTIOR_GTIOB_Pos;
88-
}
86+
gtior |= gtioca_gtior << RZ_GPT_GTIOR_GTIOA_Pos;
8987
}
90-
#endif
9188

92-
/* Check if custom GTIOR settings are provided. */
93-
if (p_extend->gtior_setting.gtior == 0) {
94-
/*
95-
* If custom GTIOR settings are not provided, configure the noise filter for
96-
* the GTIOC pins.
97-
*/
98-
gtior |= (uint32_t)(p_extend->capture_filter_gtioca << R_GPT0_GTIOR_NFAEN_Pos);
99-
gtior |= (uint32_t)(p_extend->capture_filter_gtiocb << R_GPT0_GTIOR_NFBEN_Pos);
89+
if (p_extend->gtiocb.output_enabled) {
90+
uint32_t gtiocb_gtior = pwm_rz_gpt_gtior_calculate(p_extend->gtiocb.stop_level);
91+
92+
gtior |= gtiocb_gtior << RZ_GPT_GTIOR_GTIOB_Pos;
10093
}
94+
#endif
95+
96+
/* Configure the noise filter for the GTIOC pins */
97+
gtior |= (uint32_t)(p_extend->capture_filter_gtioca << RZ_GPT_GTIOR_NFAEN_Pos);
98+
gtior |= (uint32_t)(p_extend->capture_filter_gtiocb << RZ_GPT_GTIOR_NFBEN_Pos);
10199

102-
/* Set the I/O control register. */
100+
/* Set the I/O control register */
103101
p_ctrl->p_reg->GTIOR = gtior;
104102

105103
return 0;
@@ -115,7 +113,7 @@ static int pwm_rz_gpt_set_cycles(const struct device *dev, uint32_t channel, uin
115113
fsp_err_t err;
116114
uint32_t pin;
117115

118-
/* gtioca and gtiocb setting */
116+
/* GTIOCA and GTIOCB setting */
119117
if (channel == RZ_PWM_GPT_IO_A) {
120118
pin = GPT_IO_PIN_GTIOCA;
121119
fsp_cfg_extend->gtioca.output_enabled = true;
@@ -187,12 +185,7 @@ static int pwm_rz_gpt_get_cycles_per_sec(const struct device *dev, uint32_t chan
187185
return 0;
188186
};
189187

190-
extern void gpt_capture_a_isr(void);
191-
extern void gpt_capture_b_isr(void);
192-
extern void gpt_counter_overflow_isr(void);
193-
194188
#ifdef CONFIG_PWM_CAPTURE
195-
196189
static int pwm_rz_gpt_configure_capture(const struct device *dev, uint32_t channel,
197190
pwm_flags_t flags, pwm_capture_callback_handler_t cb,
198191
void *user_data)
@@ -546,7 +539,6 @@ static void fsp_callback(timer_callback_args_t *p_args)
546539
}
547540
}
548541
}
549-
550542
#endif /* CONFIG_PWM_CAPTURE */
551543

552544
static DEVICE_API(pwm, pwm_rz_gpt_driver_api) = {
@@ -572,10 +564,10 @@ static int pwm_rz_gpt_init(const struct device *dev)
572564
return err;
573565
}
574566

575-
#if defined(CONFIG_PWM_CAPTURE)
567+
#ifdef CONFIG_PWM_CAPTURE
576568
data->fsp_cfg->p_callback = fsp_callback;
577569
data->fsp_cfg->p_context = dev;
578-
#endif /* defined(CONFIG_PWM_CAPTURE) */
570+
#endif /* CONFIG_PWM_CAPTURE */
579571

580572
err = cfg->fsp_api->open(data->fsp_ctrl, data->fsp_cfg);
581573
if (err != FSP_SUCCESS) {
@@ -591,20 +583,50 @@ static int pwm_rz_gpt_init(const struct device *dev)
591583

592584
#define GPT(idx) DT_INST_PARENT(idx)
593585

586+
#ifdef CONFIG_PWM_CAPTURE
587+
extern void gpt_capture_compare_a_isr(void);
588+
extern void gpt_capture_compare_b_isr(void);
589+
extern void gpt_counter_overflow_isr(void);
590+
591+
static void pwm_rz_gpt_ccmpa_isr(const struct device *dev)
592+
{
593+
ARG_UNUSED(dev);
594+
gpt_capture_compare_a_isr();
595+
}
596+
597+
static void pwm_rz_gpt_ccmpb_isr(const struct device *dev)
598+
{
599+
ARG_UNUSED(dev);
600+
gpt_capture_compare_b_isr();
601+
}
602+
603+
static void pwm_rz_gpt_ovf_isr(const struct device *dev)
604+
{
605+
ARG_UNUSED(dev);
606+
gpt_counter_overflow_isr();
607+
}
608+
609+
#ifdef CONFIG_CPU_CORTEX_M
610+
#define GPT_GET_IRQ_FLAGS(idx, irq_name) 0
611+
#else /* Cortex-A/R */
612+
#define GPT_GET_IRQ_FLAGS(idx, irq_name) DT_IRQ_BY_NAME(GPT(idx), irq_name, flags)
613+
#endif
614+
594615
#define PWM_RZ_IRQ_CONFIG_INIT(inst) \
595616
do { \
596617
IRQ_CONNECT(DT_IRQ_BY_NAME(GPT(inst), ccmpa, irq), \
597-
DT_IRQ_BY_NAME(GPT(inst), ccmpa, priority), gpt_capture_a_isr, NULL, \
598-
0); \
618+
DT_IRQ_BY_NAME(GPT(inst), ccmpa, priority), pwm_rz_gpt_ccmpa_isr, \
619+
DEVICE_DT_INST_GET(inst), GPT_GET_IRQ_FLAGS(inst, ccmpa)); \
599620
IRQ_CONNECT(DT_IRQ_BY_NAME(GPT(inst), ccmpb, irq), \
600-
DT_IRQ_BY_NAME(GPT(inst), ccmpb, priority), gpt_capture_b_isr, NULL, \
601-
0); \
621+
DT_IRQ_BY_NAME(GPT(inst), ccmpb, priority), pwm_rz_gpt_ccmpb_isr, \
622+
DEVICE_DT_INST_GET(inst), GPT_GET_IRQ_FLAGS(inst, ccmpb)); \
602623
IRQ_CONNECT(DT_IRQ_BY_NAME(GPT(inst), ovf, irq), \
603-
DT_IRQ_BY_NAME(GPT(inst), ovf, priority), gpt_counter_overflow_isr, \
604-
NULL, 0); \
624+
DT_IRQ_BY_NAME(GPT(inst), ovf, priority), pwm_rz_gpt_ovf_isr, \
625+
DEVICE_DT_INST_GET(inst), GPT_GET_IRQ_FLAGS(inst, ovf)); \
605626
} while (0)
627+
#endif /* CONFIG_PWM_CAPTURE */
606628

607-
#define PWM_RZG_INIT(inst) \
629+
#define PWM_RZ_INIT(inst) \
608630
PINCTRL_DT_INST_DEFINE(inst); \
609631
static gpt_instance_ctrl_t g_timer##inst##_ctrl; \
610632
static gpt_extended_cfg_t g_timer##inst##_extend = { \
@@ -632,7 +654,6 @@ static int pwm_rz_gpt_init(const struct device *dev)
632654
.capture_filter_gtioca = GPT_CAPTURE_FILTER_NONE, \
633655
.capture_filter_gtiocb = GPT_CAPTURE_FILTER_NONE, \
634656
.p_pwm_cfg = NULL, \
635-
.gtior_setting.gtior = (0x0U), \
636657
}; \
637658
static timer_cfg_t g_timer##inst##_cfg = { \
638659
.mode = TIMER_MODE_PWM, \
@@ -650,7 +671,8 @@ static int pwm_rz_gpt_init(const struct device *dev)
650671
.fsp_cfg = &g_timer##inst##_cfg, .fsp_ctrl = &g_timer##inst##_ctrl}; \
651672
static int pwm_rz_gpt_init_##inst(const struct device *dev) \
652673
{ \
653-
PWM_RZ_IRQ_CONFIG_INIT(inst); \
674+
IF_ENABLED(CONFIG_PWM_CAPTURE, \
675+
(PWM_RZ_IRQ_CONFIG_INIT(inst);)) \
654676
int err = pwm_rz_gpt_init(dev); \
655677
if (err != 0) { \
656678
return err; \
@@ -661,4 +683,4 @@ static int pwm_rz_gpt_init(const struct device *dev)
661683
&pwm_rz_gpt_config_##inst, POST_KERNEL, CONFIG_PWM_INIT_PRIORITY, \
662684
&pwm_rz_gpt_driver_api);
663685

664-
DT_INST_FOREACH_STATUS_OKAY(PWM_RZG_INIT);
686+
DT_INST_FOREACH_STATUS_OKAY(PWM_RZ_INIT);

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