arch: arm: mmu: allow to select the memory type for non-cacheable mem

Selecting MT_DEVICE for non cache-able memory does no work in all use
cases.
For instance for net samples a non-cacheable memory can be used for
descriptors and buffers exchanged between the lib and the hardware.
In such context, the net lib can perform some non word aligned memory
this lead to an alignment data abort if the attribute is MT_DEVICE.
Memories attribute should be MT_NORMAL, allowing non aligned transfer

Signed-off-by: Arnaud Pouliquen <[email protected]>arch: arm: mmu: allow selecting memory type for non-cacheable memory

Author: arnopo

arch/arm/core/mmu/arm_mmu.c

@@ -891,6 +891,17 @@ static int __arch_mem_map(void *virt, uintptr_t phys, size_t size, uint32_t flag
 	switch (flags & K_MEM_CACHE_MASK) {
 
 	case K_MEM_CACHE_NONE:
+		switch (flags & K_MEM_ARM_NC_TYPE_MASK) {
+		case K_MEM_ARM_STRONGLY_ORDERED_NC:
+			conv_flags |= MT_STRONGLY_ORDERED;
+			break;
+		case K_MEM_ARM_NORMAL_NC:
+			conv_flags |= MT_NORMAL;
+			break;
+		default:
+			conv_flags |= MT_DEVICE;
+		}
+		break;
 	default:
 		conv_flags |= MT_DEVICE;
 		break;