soc: cv32a6: Remove erroneous CPU_HAS_FPU configs

In the default configuration, cv32a6 does not have an FPU and does not
implement RISC-V's F and D extensions.
Hence, the FPU flags should not be added.
In the future, a second SoC for cv32a6 systems with FPU can be added.

Signed-off-by: Eric Ackermann <[email protected]>

Author: WorldofJARcraft

soc/openhwgroup/cva6/cv32a6/Kconfig

@@ -9,8 +9,6 @@ config SOC_CV32A6
 	select RISCV_HAS_PLIC
 	select USE_SWITCH_SUPPORTED
 	select USE_SWITCH
-	select CPU_HAS_FPU
-	select CPU_HAS_FPU_DOUBLE_PRECISION
 	select SCHED_IPI_SUPPORTED
 	select RISCV_ISA_RV32I
 	select RISCV_ISA_EXT_M