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include/arch/arm: linker.ld: Add shared memory sections definitions
STM32WB HCI driver requires definition of 2 RAM regions to support use of 3 shared memory sections: MAPPING_TABLE, MB_MEM1 and MB_MEM2. In linker.ld, under conditions of HCI driver to be enabled, define SRAM1 and SRAM2 based on input defined in stm32wb linker. Then define the 3 sections MAPPING_TABLE, MB_MEM1 and MB_MEM Signed-off-by: Erwan Gouriou <[email protected]>
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include/arch/arm/cortex_m/scripts/linker.ld

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@@ -102,7 +102,10 @@ MEMORY
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CCM (rw) : ORIGIN = DT_CCM_BASE_ADDRESS, LENGTH = DT_CCM_SIZE * 1K
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#endif
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SRAM (wx) : ORIGIN = RAM_ADDR, LENGTH = RAM_SIZE
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#ifdef CONFIG_BT_STM32_IPM
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SRAM1 (rw) : ORIGIN = RAM1_ADDR, LENGTH = RAM1_SIZE
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SRAM2 (rw) : ORIGIN = RAM2_ADDR, LENGTH = RAM2_SIZE
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#endif
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/* Used by and documented in include/linker/intlist.ld */
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IDT_LIST (wx) : ORIGIN = (RAM_ADDR + RAM_SIZE), LENGTH = 2K
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}

soc/arm/st_stm32/stm32wb/CMakeLists.txt

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@@ -2,3 +2,8 @@ zephyr_include_directories(${ZEPHYR_BASE}/drivers)
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zephyr_sources(
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soc.c
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)
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zephyr_linker_sources_ifdef(CONFIG_BT_STM32_IPM
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SECTIONS
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ipm.ld
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)

soc/arm/st_stm32/stm32wb/ipm.ld

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/*
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* Copyright (c) 2019 Linaro Limited
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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MAPPING_TABLE (NOLOAD) : {_sMAPPING_TABLE = .; *(MAPPING_TABLE); _eMAPPING_TABLE = .; } >SRAM1
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MB_MEM1 (NOLOAD) : { _sMB_MEM1 = .; *(MB_MEM1); _eMB_MEM1 = .; } >SRAM1
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MB_MEM2 (NOLOAD) : { _sMB_MEM2 = .; *(MB_MEM2); _eMB_MEM2 = .; } >SRAM2

soc/arm/st_stm32/stm32wb/linker.ld

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/* linker.ld - Linker command/script file */
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/*
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* Copyright (c) 2014-2016 Wind River Systems, Inc.
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* Copyright (c) 2019 Linaro Limited
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#define RAM1_SIZE (10 * 1K)
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#define RAM1_ADDR 0x20030000
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#define RAM2_SIZE (20 * 1K)
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#define RAM2_ADDR 0x20038000
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#include <arch/arm/cortex_m/scripts/linker.ld>

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