boards: st: stm32mp135f_dk: add ethernet nodes

The STM32MP135F-DK board embeds 2 ethernets. Enable the ethernet1
in RMII mode with associated PHY.

Signed-off-by: Arnaud Pouliquen <[email protected]>
Signed-off-by: Arif Balik <[email protected]>

Author: arnopo

boards/st/stm32mp135f_dk/Kconfig.defconfig

@@ -12,4 +12,7 @@ config GPIO_MCP230XX_INIT_PRIORITY
 
 endif # GPIO_MCP230XX
 
+config NET_L2_ETHERNET
+	default y if NETWORKING
+
 endif # BOARD_STM32MP135F_DK

boards/st/stm32mp135f_dk/stm32mp135f_dk.dts

@@ -73,6 +73,13 @@
 		gpio-map = <CSI_IO0 0 &mcp23017 4 0>,
 			   <CSI_IO1 0 &mcp23017 3 0>;
 	};
+
+	eth_ram: sram@30000000 {
+		compatible = "zephyr,memory-region", "mmio-sram";
+		reg = <0x2FFE0000 DT_SIZE_K(16)>;
+		#memory-region-cells = <0>;
+		zephyr,memory-region = "ETH_SRAM";
+	};
 };
 
 &clk_hsi {
@@ -111,6 +118,17 @@
 	status = "okay";
 };
 
+&pll4 {
+	clocks = <&clk_hsi>;
+	div-m = <2>;
+	mul-n = <50>;
+	div-p = <12>;
+	div-q = <60>;
+	div-r = <6>;
+	fracn = <0>;
+	status = "okay";
+};
+
 &rcc {
 	clock-frequency = <DT_FREQ_M(1000)>;
 	clocks = <&pll>;
@@ -250,3 +268,30 @@ csi_interface: &dcmipp {
 
 	status = "disabled";
 };
+
+&mac {
+	status = "okay";
+	pinctrl-0 = <&eth1_txd0_pg13
+		     &eth1_txd1_pg14
+		     &eth1_tx_ctl_pb11
+		     &eth1_ref_clk_pa1
+		     &eth1_rxd0_pc4
+		     &eth1_rxd1_pc5
+		     &eth1_crs_dv_pc1>;
+	pinctrl-names = "default";
+	phy-connection-type = "rmii";
+	phy-handle = <&eth_phy>;
+	memory-regions = <&eth_ram>;
+};
+
+&mdio {
+	status = "okay";
+	pinctrl-0 = <&eth1_mdio_pa2 &eth1_mdc_pg2>;
+	pinctrl-names = "default";
+
+	eth_phy: ethernet-phy@0 {
+		compatible = "microchip,lan8742";
+		reg = <0>;
+		reset-gpios = <&mcp23017 9 GPIO_ACTIVE_LOW>;
+	};
+};