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9 | 9 | #include <zephyr/dt-bindings/interrupt-controller/arm-gic.h> |
10 | 10 | #include <zephyr/dt-bindings/clock/intel_socfpga_clock.h> |
11 | 11 | #include <mem.h> |
| 12 | +#include <zephyr/dt-bindings/i2c/i2c.h> |
12 | 13 |
|
13 | 14 | / { |
14 | 15 | cpus { |
|
188 | 189 | clocks = <&clock INTEL_SOCFPGA_CLOCK_WDT>; |
189 | 190 | status = "disabled"; |
190 | 191 | }; |
| 192 | + |
| 193 | + i2c0: i2c@ffc02800 { |
| 194 | + compatible = "snps,designware-i2c"; |
| 195 | + reg = <0xffc02800 0x100>; |
| 196 | + interrupt-parent = <&gic>; |
| 197 | + interrupts = <GIC_SPI 103 IRQ_TYPE_LEVEL |
| 198 | + IRQ_DEFAULT_PRIORITY>; |
| 199 | + clock-frequency = <I2C_BITRATE_STANDARD>; |
| 200 | + #address-cells = <1>; |
| 201 | + #size-cells = <0>; |
| 202 | + status = "disabled"; |
| 203 | + }; |
| 204 | + |
| 205 | + i2c1: i2c@ffC02900 { |
| 206 | + compatible = "snps,designware-i2c"; |
| 207 | + reg = <0xffC02900 0x100>; |
| 208 | + interrupt-parent = <&gic>; |
| 209 | + interrupts = <GIC_SPI 104 IRQ_TYPE_LEVEL |
| 210 | + IRQ_DEFAULT_PRIORITY>; |
| 211 | + clock-frequency = <I2C_BITRATE_STANDARD>; |
| 212 | + #address-cells = <1>; |
| 213 | + #size-cells = <0>; |
| 214 | + status = "disabled"; |
| 215 | + }; |
| 216 | + |
| 217 | + i2c2: i2c@ffC02A00 { |
| 218 | + compatible = "snps,designware-i2c"; |
| 219 | + reg = <0xffC02A00 0x100>; |
| 220 | + interrupt-parent = <&gic>; |
| 221 | + interrupts = <GIC_SPI 105 IRQ_TYPE_LEVEL |
| 222 | + IRQ_DEFAULT_PRIORITY>; |
| 223 | + clock-frequency = <I2C_BITRATE_STANDARD>; |
| 224 | + #address-cells = <1>; |
| 225 | + #size-cells = <0>; |
| 226 | + status = "disabled"; |
| 227 | + }; |
| 228 | + |
| 229 | + i2c3: i2c@ffC02B00 { |
| 230 | + compatible = "snps,designware-i2c"; |
| 231 | + reg = <0xffC02B00 0x100>; |
| 232 | + interrupt-parent = <&gic>; |
| 233 | + interrupts = <GIC_SPI 106 IRQ_TYPE_LEVEL |
| 234 | + IRQ_DEFAULT_PRIORITY>; |
| 235 | + clock-frequency = <I2C_BITRATE_STANDARD>; |
| 236 | + #address-cells = <1>; |
| 237 | + #size-cells = <0>; |
| 238 | + status = "disabled"; |
| 239 | + }; |
| 240 | + |
| 241 | + i2c4: i2c@ffC02C00 { |
| 242 | + compatible = "snps,designware-i2c"; |
| 243 | + reg = <0xffC02C00 0x100>; |
| 244 | + interrupt-parent = <&gic>; |
| 245 | + interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL |
| 246 | + IRQ_DEFAULT_PRIORITY>; |
| 247 | + clock-frequency = <I2C_BITRATE_STANDARD>; |
| 248 | + #address-cells = <1>; |
| 249 | + #size-cells = <0>; |
| 250 | + status = "disabled"; |
| 251 | + }; |
191 | 252 | }; |
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