drivers: i2s: nrfx: Allow MCK bypass for proper LRCK and MCK Ratios

nRF53 series SoCs have a dedicated configurable audio PLL and the ability
to enable MCK bypass via a register value CONFIG.CLKCONFIG. This can
enable higher MCK/LRCK ratios that some I2S peripherals require the host
to generate. Allow an application developer to choose if they want to
initially look for a bypass ratio and, if found, enable bypass in the
NRFX driver. If not, the standard MCK calculation is conducted as normal.

Signed-off-by: Sean O'Connor <[email protected]>

Author: standalone-tech

drivers/i2s/Kconfig.nrfx

@@ -21,6 +21,14 @@ config I2S_NRFX_TX_BLOCK_COUNT
 	int "TX queue length"
 	default 4
 
+config I2S_NRFX_ALLOW_MCK_BYPASS
+	bool "Allow MCK bypass if a ratio exists"
+	depends on SOC_SERIES_NRF53X
+	help
+	  Search for a supported ratio directly from MCK and LRCK
+	  and enable bypass if a ratio exists. If not, fallback to
+	  the standard MCK selection mechanism.
+
 endif # I2S_NRFX
 
 menuconfig I2S_NRF_TDM

drivers/i2s/i2s_nrfx.c

@@ -95,6 +95,26 @@ static void find_suitable_clock(const struct i2s_nrfx_drv_cfg *drv_cfg,
 	nrf_i2s_mck_t best_mck_cfg = 0;
 	uint32_t best_mck = 0;
 
+#if defined(CONFIG_I2S_NRFX_ALLOW_MCK_BYPASS) && NRF_I2S_HAS_CLKCONFIG
+	/* Check for bypass before calculating f_MCK */
+	for (r = 0; r < ARRAY_SIZE(ratios); ++r) {
+		if (i2s_cfg->frame_clk_freq * ratios[r].ratio_val == src_freq) {
+			LOG_INF("MCK bypass calculated");
+			best_r = r;
+			best_mck = src_freq;
+			best_diff = 0;
+
+			/* Set CONFIG.MCKFREQ register to non-zero reset value to
+			 * ensure peripheral functionality
+			 */
+			best_mck_cfg = NRF_I2S_MCK_32MDIV8;
+
+			config->enable_bypass = true;
+			break;
+		}
+	}
+#endif
+
 	for (r = 0; (best_diff != 0) && (r < ARRAY_SIZE(ratios)); ++r) {
 		/* Only multiples of the frame width can be used as ratios. */
 		if ((ratios[r].ratio_val % bits_per_frame) != 0) {
@@ -760,7 +780,7 @@ static int trigger_start(const struct device *dev)
 	nrf_i2s_clk_configure(drv_cfg->i2s.p_reg,
 			      drv_cfg->clk_src == ACLK ? NRF_I2S_CLKSRC_ACLK
 						       : NRF_I2S_CLKSRC_PCLK32M,
-			      false);
+			      nrfx_cfg->enable_bypass);
 #endif
 
 	/* If it is required to use certain HF clock, request it to be running

samples/drivers/i2s/echo/boards/nrf5340dk_nrf5340_cpuapp.conf

@@ -0,0 +1,7 @@
+#
+# Copyright The Zephyr Project Contributors
+#
+# SPDX-License-Identifier: Apache-2.0
+#
+
+CONFIG_I2S_NRFX_ALLOW_MCK_BYPASS=y