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henrikbrixandersenMaureenHelm
henrikbrixandersen
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MaureenHelm
committed
drivers: pwm: add driver for the NXP Kinetis Pulse Width Timer (PWT)
Add PWM capture driver for the NXP Kinetis Pulse Width Timer (PWT). Signed-off-by: Henrik Brix Andersen <[email protected]>
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‎drivers/pwm/CMakeLists.txt‎

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Original file line numberDiff line numberDiff line change
@@ -18,6 +18,7 @@ zephyr_library_sources_ifdef(CONFIG_PWM_MCUX_TPM pwm_mcux_tpm.c)
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zephyr_library_sources_ifdef(CONFIG_PWM_SAM0_TCC pwm_sam0_tcc.c)
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zephyr_library_sources_ifdef(CONFIG_PWM_NPCX pwm_npcx.c)
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zephyr_library_sources_ifdef(CONFIG_PWM_XLNX_AXI_TIMER pwm_xlnx_axi_timer.c)
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zephyr_library_sources_ifdef(CONFIG_PWM_MCUX_PWT pwm_mcux_pwt.c)
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zephyr_library_sources_ifdef(CONFIG_USERSPACE pwm_handlers.c)
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zephyr_library_sources_ifdef(CONFIG_PWM_CAPTURE pwm_capture.c)

‎drivers/pwm/Kconfig‎

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Original file line numberDiff line numberDiff line change
@@ -59,4 +59,6 @@ source "drivers/pwm/Kconfig.npcx"
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source "drivers/pwm/Kconfig.xlnx"
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source "drivers/pwm/Kconfig.mcux_pwt"
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endif # PWM

‎drivers/pwm/Kconfig.mcux_pwt‎

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Original file line numberDiff line numberDiff line change
@@ -0,0 +1,10 @@
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# Copyright 2021 Vestas Wind Systems A/S
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# SPDX-License-Identifier: Apache-2.0
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# MCUX PWT PWM
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config PWM_MCUX_PWT
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bool "MCUX PWT PWM capture driver"
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depends on HAS_MCUX_PWT && CLOCK_CONTROL && PWM_CAPTURE
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help
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Enable the MCUX Pulse Width Timer (PWT) PWM capture driver.

‎drivers/pwm/pwm_mcux_pwt.c‎

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/*
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* Copyright (c) 2021 Vestas Wind Systems A/S
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#define DT_DRV_COMPAT nxp_kinetis_pwt
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#include <drivers/clock_control.h>
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#include <errno.h>
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#include <drivers/pwm.h>
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#include <soc.h>
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#include <fsl_pwt.h>
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#include <fsl_clock.h>
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#include <logging/log.h>
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LOG_MODULE_REGISTER(pwm_mcux_pwt, CONFIG_PWM_LOG_LEVEL);
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/* Number of PWT input ports */
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#define PWT_INPUTS 4U
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struct mcux_pwt_config {
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PWT_Type *base;
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char *clock_name;
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clock_control_subsys_t clock_subsys;
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pwt_clock_source_t pwt_clock_source;
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pwt_clock_prescale_t prescale;
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void (*irq_config_func)(const struct device *dev);
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};
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struct mcux_pwt_data {
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uint32_t clock_freq;
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uint32_t period_cycles;
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uint32_t high_overflows;
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uint32_t low_overflows;
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pwm_capture_callback_handler_t callback;
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void *user_data;
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pwt_config_t pwt_config;
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bool continuous : 1;
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bool inverted : 1;
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bool overflowed : 1;
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};
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static inline bool mcux_pwt_is_active(const struct device *dev)
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{
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const struct mcux_pwt_config *config = dev->config;
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return !!(config->base->CS & PWT_CS_PWTEN_MASK);
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}
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static int mcux_pwt_pin_set(const struct device *dev, uint32_t pwm,
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uint32_t period_cycles, uint32_t pulse_cycles,
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pwm_flags_t flags)
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{
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ARG_UNUSED(dev);
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ARG_UNUSED(pwm);
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ARG_UNUSED(period_cycles);
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ARG_UNUSED(pulse_cycles);
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ARG_UNUSED(flags);
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LOG_ERR("pwt only supports pwm capture");
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return -ENOTSUP;
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}
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static int mcux_pwt_pin_configure_capture(const struct device *dev,
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uint32_t pwm,
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pwm_flags_t flags,
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pwm_capture_callback_handler_t cb,
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void *user_data)
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{
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const struct mcux_pwt_config *config = dev->config;
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struct mcux_pwt_data *data = dev->data;
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if (pwm >= PWT_INPUTS) {
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LOG_ERR("invalid channel %d", pwm);
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return -EINVAL;
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}
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if (mcux_pwt_is_active(dev)) {
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LOG_ERR("pwm capture in progress");
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return -EBUSY;
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}
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data->callback = cb;
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data->user_data = user_data;
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data->pwt_config.inputSelect = pwm;
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data->continuous =
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(flags & PWM_CAPTURE_MODE_MASK) == PWM_CAPTURE_MODE_CONTINUOUS;
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data->inverted =
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(flags & PWM_POLARITY_MASK) == PWM_POLARITY_INVERTED;
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PWT_Init(config->base, &data->pwt_config);
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PWT_EnableInterrupts(config->base,
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kPWT_PulseWidthReadyInterruptEnable |
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kPWT_CounterOverflowInterruptEnable);
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return 0;
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}
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static int mcux_pwt_pin_enable_capture(const struct device *dev, uint32_t pwm)
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{
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const struct mcux_pwt_config *config = dev->config;
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struct mcux_pwt_data *data = dev->data;
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if (pwm >= PWT_INPUTS) {
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LOG_ERR("invalid channel %d", pwm);
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return -EINVAL;
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}
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if (!data->callback) {
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LOG_ERR("PWM capture not configured");
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return -EINVAL;
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}
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if (mcux_pwt_is_active(dev)) {
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LOG_ERR("PWM capture already enabled");
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return -EBUSY;
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}
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data->overflowed = false;
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data->high_overflows = 0;
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data->low_overflows = 0;
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PWT_StartTimer(config->base);
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return 0;
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}
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static int mcux_pwt_pin_disable_capture(const struct device *dev, uint32_t pwm)
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{
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const struct mcux_pwt_config *config = dev->config;
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if (pwm >= PWT_INPUTS) {
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LOG_ERR("invalid channel %d", pwm);
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return -EINVAL;
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}
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PWT_StopTimer(config->base);
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return 0;
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}
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static int mcux_pwt_calc_period(uint16_t ppw, uint16_t npw,
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uint32_t high_overflows,
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uint32_t low_overflows,
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uint32_t *result)
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{
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uint32_t period;
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/* Calculate sum of overflow counters */
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if (u32_add_overflow(high_overflows, low_overflows, &period)) {
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return -ERANGE;
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}
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/* Calculate cycles from sum of overflow counters */
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if (u32_mul_overflow(period, 0xFFFFU, &period)) {
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return -ERANGE;
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}
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/* Add positive pulse width */
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if (u32_add_overflow(period, ppw, &period)) {
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return -ERANGE;
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}
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/* Add negative pulse width */
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if (u32_add_overflow(period, npw, &period)) {
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return -ERANGE;
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}
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*result = period;
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return 0;
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}
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static int mcux_pwt_calc_pulse(uint16_t pw, uint32_t overflows,
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uint32_t *result)
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{
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uint32_t pulse;
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/* Calculate cycles from overflow counter */
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if (u32_mul_overflow(overflows, 0xFFFFU, &pulse)) {
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return -ERANGE;
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}
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/* Add pulse width */
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if (u32_add_overflow(pulse, pw, &pulse)) {
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return -ERANGE;
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}
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*result = pulse;
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return 0;
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}
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static void mcux_pwt_isr(const struct device *dev)
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{
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const struct mcux_pwt_config *config = dev->config;
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struct mcux_pwt_data *data = dev->data;
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uint32_t period = 0;
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uint32_t pulse = 0;
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uint32_t flags;
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uint16_t ppw;
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uint16_t npw;
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int err;
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flags = PWT_GetStatusFlags(config->base);
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if (flags & kPWT_CounterOverflowFlag) {
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if (config->base->CR & PWT_CR_LVL_MASK) {
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data->overflowed |= u32_add_overflow(1,
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data->high_overflows, &data->high_overflows);
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} else {
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data->overflowed |= u32_add_overflow(1,
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data->low_overflows, &data->low_overflows);
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}
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PWT_ClearStatusFlags(config->base, kPWT_CounterOverflowFlag);
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}
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if (flags & kPWT_PulseWidthValidFlag) {
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ppw = PWT_ReadPositivePulseWidth(config->base);
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npw = PWT_ReadNegativePulseWidth(config->base);
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if (!data->continuous) {
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PWT_StopTimer(config->base);
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}
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if (data->inverted) {
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err = mcux_pwt_calc_pulse(npw, data->low_overflows,
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&pulse);
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} else {
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err = mcux_pwt_calc_pulse(ppw, data->high_overflows,
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&pulse);
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}
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if (err == 0) {
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err = mcux_pwt_calc_period(ppw, npw,
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data->high_overflows,
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data->low_overflows,
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&period);
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}
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if (data->overflowed) {
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err = -ERANGE;
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}
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LOG_DBG("period = %d, pulse = %d, err = %d", period, pulse,
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err);
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if (data->callback) {
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data->callback(dev, data->pwt_config.inputSelect,
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period, pulse, err, data->user_data);
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}
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data->overflowed = false;
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data->high_overflows = 0;
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data->low_overflows = 0;
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PWT_ClearStatusFlags(config->base, kPWT_PulseWidthValidFlag);
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}
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}
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static int mcux_pwt_get_cycles_per_sec(const struct device *dev, uint32_t pwm,
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uint64_t *cycles)
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{
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const struct mcux_pwt_config *config = dev->config;
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struct mcux_pwt_data *data = dev->data;
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ARG_UNUSED(pwm);
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*cycles = data->clock_freq >> config->prescale;
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return 0;
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}
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static int mcux_pwt_init(const struct device *dev)
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{
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const struct mcux_pwt_config *config = dev->config;
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struct mcux_pwt_data *data = dev->data;
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pwt_config_t *pwt_config = &data->pwt_config;
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const struct device *clock_dev;
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clock_dev = device_get_binding(config->clock_name);
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if (clock_dev == NULL) {
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LOG_ERR("could not get clock device");
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return -EINVAL;
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}
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if (clock_control_get_rate(clock_dev, config->clock_subsys,
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&data->clock_freq)) {
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LOG_ERR("could not get clock frequency");
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return -EINVAL;
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}
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PWT_GetDefaultConfig(pwt_config);
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pwt_config->clockSource = config->pwt_clock_source;
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pwt_config->prescale = config->prescale;
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pwt_config->enableFirstCounterLoad = true;
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PWT_Init(config->base, pwt_config);
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config->irq_config_func(dev);
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return 0;
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}
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static const struct pwm_driver_api mcux_pwt_driver_api = {
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.pin_set = mcux_pwt_pin_set,
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.get_cycles_per_sec = mcux_pwt_get_cycles_per_sec,
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.pin_configure_capture = mcux_pwt_pin_configure_capture,
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.pin_enable_capture = mcux_pwt_pin_enable_capture,
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.pin_disable_capture = mcux_pwt_pin_disable_capture,
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};
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#define TO_PWT_PRESCALE_DIVIDE(val) _DO_CONCAT(kPWT_Prescale_Divide_, val)
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#define PWT_DEVICE(n) \
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static void mcux_pwt_config_func_##n(const struct device *dev); \
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\
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static const struct mcux_pwt_config mcux_pwt_config_##n = { \
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.base = (PWT_Type *)DT_INST_REG_ADDR(n), \
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.clock_name = DT_INST_CLOCKS_LABEL(n), \
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.clock_subsys = \
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(clock_control_subsys_t)DT_INST_CLOCKS_CELL(n, name), \
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.pwt_clock_source = kPWT_BusClock, \
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.prescale = \
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TO_PWT_PRESCALE_DIVIDE(DT_INST_PROP(n, prescaler)), \
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.irq_config_func = mcux_pwt_config_func_##n, \
329+
}; \
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\
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static struct mcux_pwt_data mcux_pwt_data_##n; \
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\
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DEVICE_DT_INST_DEFINE(n, &mcux_pwt_init, \
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device_pm_control_nop, &mcux_pwt_data_##n, \
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&mcux_pwt_config_##n, \
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POST_KERNEL, \
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CONFIG_KERNEL_INIT_PRIORITY_DEVICE, \
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&mcux_pwt_driver_api); \
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\
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static void mcux_pwt_config_func_##n(const struct device *dev) \
341+
{ \
342+
IRQ_CONNECT(DT_INST_IRQN(n), DT_INST_IRQ(n, priority), \
343+
mcux_pwt_isr, DEVICE_DT_INST_GET(n), 0); \
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irq_enable(DT_INST_IRQN(n)); \
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}
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DT_INST_FOREACH_STATUS_OKAY(PWT_DEVICE)

‎soc/arm/nxp_kinetis/ke1xf/Kconfig.defconfig.series‎

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@@ -50,6 +50,10 @@ config PWM_MCUX_FTM
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default y
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depends on PWM
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config PWM_MCUX_PWT
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default y
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depends on PWM_CAPTURE
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config PINMUX_MCUX
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default y
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depends on PINMUX

‎soc/arm/nxp_kinetis/ke1xf/Kconfig.series‎

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@@ -29,5 +29,6 @@ config SOC_SERIES_KINETIS_KE1XF
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select HAS_MCUX_DAC32
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select HAS_MCUX_EDMA
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select HAS_MCUX_ACMP
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select HAS_MCUX_PWT
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help
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Enable support for Kinetis KE1xF MCU series

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