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pdgendtkartben
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drivers: ethernet: phy: dm8806: Fix driver bindings
There were some driver bindings issues for the davicom dm8806 driver: - Missing type for reg-switch binding - Missing required: true for int/reset gpios - Fix macro for reg-switch Signed-off-by: Pieter De Gendt <[email protected]>
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drivers/ethernet/phy/phy_dm8806.c

Lines changed: 3 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -673,9 +673,9 @@ static DEVICE_API(ethphy, phy_dm8806_api) = {
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static const struct phy_dm8806_config phy_dm8806_config_##n = { \
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.mdio = DEVICE_DT_GET(DT_INST_BUS(n)), \
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.phy_addr = DT_INST_REG_ADDR(n), \
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.switch_addr = DT_PROP(DT_NODELABEL(dm8806_phy##n), reg_switch), \
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.gpio_int = GPIO_DT_SPEC_INST_GET(n, interrupt_gpio), \
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.gpio_rst = GPIO_DT_SPEC_INST_GET(n, reset_gpio), \
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.switch_addr = DT_INST_PROP(n, reg_switch), \
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.gpio_int = GPIO_DT_SPEC_INST_GET(n, int_gpios), \
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.gpio_rst = GPIO_DT_SPEC_INST_GET(n, reset_gpios), \
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}
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#define DM8806_PHY_INITIALIZE(n) \

dts/bindings/ethernet/davicom,dm8806-phy.yaml

Lines changed: 3 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -29,6 +29,7 @@ properties:
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Absolute address is the address of the concrete register in MAC PHY0
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which is responsible for Ethernet Port0 in Davicom DM8806
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reg-switch:
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type: int
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required: true
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description: |
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5-bit PHY address for Switch Per-Port Registers group of Davicom DM8806
@@ -48,9 +49,11 @@ properties:
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which is responsible for Ethernet Port0 in Davicom DM8806
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reset-gpios:
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type: phandle-array
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required: true
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description: GPIO connected to MAC PHY reset signal pin. Reset is active low.
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int-gpios:
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type: phandle-array
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required: true
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description: GPIO for upt signal indicating MAC PHY state change.
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davicom,interface-type:
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type: string

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