soc: imx93: enable lpspi

- Add LPSPI1 ~ LPSPI8 instances to soc dtsi.
- Expand clock dt-bindings for LPSPI to instance 7 & 8.
- Add LPSPI driver in imx9 Kconfig.

Signed-off-by: Chekhov Ma <[email protected]>

Author: CkovMk

dts/arm64/nxp/nxp_mimx93_a55.dtsi

@@ -191,4 +191,92 @@
 		clocks = <&ccm IMX_CCM_LPI2C8_CLK 0x80 24>;
 		status = "disabled";
 	};
+
+	lpspi1: spi@44360000 {
+		compatible = "nxp,imx-lpspi";
+		reg = <0x44360000 0x4000>;
+		interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>;
+		interrupt-parent = <&gic>;
+		status = "disabled";
+		clocks = <&ccm IMX_CCM_LPSPI1_CLK 0x6c 0>;
+		#address-cells = <1>;
+		#size-cells = <0>;
+	};
+
+	lpspi2: spi@44370000 {
+		compatible = "nxp,imx-lpspi";
+		reg = <0x44370000 0x4000>;
+		interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>;
+		interrupt-parent = <&gic>;
+		status = "disabled";
+		clocks = <&ccm IMX_CCM_LPSPI2_CLK 0x6c 2>;
+		#address-cells = <1>;
+		#size-cells = <0>;
+	};
+
+	lpspi3: spi@42550000 {
+		compatible = "nxp,imx-lpspi";
+		reg = <0x42550000 0x4000>;
+		interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>;
+		interrupt-parent = <&gic>;
+		status = "disabled";
+		clocks = <&ccm IMX_CCM_LPSPI3_CLK 0x6c 4>;
+		#address-cells = <1>;
+		#size-cells = <0>;
+	};
+
+	lpspi4: spi@42560000 {
+		compatible = "nxp,imx-lpspi";
+		reg = <0x42560000 0x4000>;
+		interrupts = <GIC_SPI 66 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>;
+		interrupt-parent = <&gic>;
+		status = "disabled";
+		clocks = <&ccm IMX_CCM_LPSPI4_CLK 0x6c 6>;
+		#address-cells = <1>;
+		#size-cells = <0>;
+	};
+
+	lpspi5: spi@426f0000 {
+		compatible = "nxp,imx-lpspi";
+		reg = <0x426f0000 0x4000>;
+		interrupts = <GIC_SPI 191 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>;
+		interrupt-parent = <&gic>;
+		status = "disabled";
+		clocks = <&ccm IMX_CCM_LPSPI5_CLK 0x6c 6>;
+		#address-cells = <1>;
+		#size-cells = <0>;
+	};
+
+	lpspi6: spi@42700000 {
+		compatible = "nxp,imx-lpspi";
+		reg = <0x42700000 0x4000>;
+		interrupts = <GIC_SPI 192 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>;
+		interrupt-parent = <&gic>;
+		status = "disabled";
+		clocks = <&ccm IMX_CCM_LPSPI6_CLK 0x6c 6>;
+		#address-cells = <1>;
+		#size-cells = <0>;
+	};
+
+	lpspi7: spi@42710000 {
+		compatible = "nxp,imx-lpspi";
+		reg = <0x42710000 0x4000>;
+		interrupts = <GIC_SPI 193 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>;
+		interrupt-parent = <&gic>;
+		status = "disabled";
+		clocks = <&ccm IMX_CCM_LPSPI7_CLK 0x6c 0>;
+		#address-cells = <1>;
+		#size-cells = <0>;
+	};
+
+	lpspi8: spi@42720000 {
+		compatible = "nxp,imx-lpspi";
+		reg = <0x42720000 0x4000>;
+		interrupts = <GIC_SPI 194 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>;
+		interrupt-parent = <&gic>;
+		status = "disabled";
+		clocks = <&ccm IMX_CCM_LPSPI8_CLK 0x6c 2>;
+		#address-cells = <1>;
+		#size-cells = <0>;
+	};
 };

include/zephyr/dt-bindings/clock/imx_ccm_rev2.h

@@ -53,6 +53,8 @@
 #define IMX_CCM_LPSPI4_CLK		0x503UL
 #define IMX_CCM_LPSPI5_CLK		0x504UL
 #define IMX_CCM_LPSPI6_CLK		0x505UL
+#define IMX_CCM_LPSPI7_CLK		0x506UL
+#define IMX_CCM_LPSPI8_CLK		0x507UL
 
 /* USDHC */
 #define IMX_CCM_USDHC1_CLK		0x600UL