11/*
22 * Copyright (c) 2020 Teslabs Engineering S.L.
33 * Copyright (c) 2021 Krivorot Oleg <[email protected] > 4+ * Copyright (c) 2022 Konstantinos Papadopoulos <[email protected] > 45 *
56 * SPDX-License-Identifier: Apache-2.0
67 */
1112
1213/* Commands/registers. */
1314#define ILI9341_GAMSET 0x26
15+ #define ILI9341_IFMODE 0xB0
1416#define ILI9341_FRMCTR1 0xB1
1517#define ILI9341_DISCTRL 0xB6
1618#define ILI9341_ETMOD 0xB7
2628#define ILI9341_TIMCTRLB 0xEA
2729#define ILI9341_PWSEQCTRL 0xED
2830#define ILI9341_ENABLE3G 0xF2
31+ #define ILI9341_IFCTL 0xF6
2932#define ILI9341_PUMPRATIOCTRL 0xF7
3033
3134/* Commands/registers length. */
3235#define ILI9341_GAMSET_LEN 1U
36+ #define ILI9341_IFMODE_LEN 1U
3337#define ILI9341_FRMCTR1_LEN 2U
3438#define ILI9341_DISCTRL_LEN 3U
3539#define ILI9341_PWCTRL1_LEN 1U
4549#define ILI9341_TIMCTRLB_LEN 2U
4650#define ILI9341_PUMPRATIOCTRL_LEN 1U
4751#define ILI9341_ENABLE3G_LEN 1U
52+ #define ILI9341_IFCTL_LEN 3U
4853#define ILI9341_ETMOD_LEN 1U
4954
5055/** X resolution (pixels). */
5560/** ILI9341 registers to be initialized. */
5661struct ili9341_regs {
5762 uint8_t gamset [ILI9341_GAMSET_LEN ];
63+ uint8_t ifmode [ILI9341_IFMODE_LEN ];
5864 uint8_t frmctr1 [ILI9341_FRMCTR1_LEN ];
5965 uint8_t disctrl [ILI9341_DISCTRL_LEN ];
6066 uint8_t pwctrl1 [ILI9341_PWCTRL1_LEN ];
@@ -70,13 +76,16 @@ struct ili9341_regs {
7076 uint8_t timctrlb [ILI9341_TIMCTRLB_LEN ];
7177 uint8_t pumpratioctrl [ILI9341_PUMPRATIOCTRL_LEN ];
7278 uint8_t enable3g [ILI9341_ENABLE3G_LEN ];
79+ uint8_t ifctl [ILI9341_IFCTL_LEN ];
7380 uint8_t etmod [ILI9341_ETMOD_LEN ];
7481};
7582
7683/* Initializer macro for ILI9341 registers. */
7784#define ILI9341_REGS_INIT (n ) \
7885 BUILD_ASSERT(DT_PROP_LEN(DT_INST(n, ilitek_ili9341), gamset) == ILI9341_GAMSET_LEN, \
7986 "ili9341: Error length gamma set (GAMSET) register"); \
87+ BUILD_ASSERT(DT_PROP_LEN(DT_INST(n, ilitek_ili9341), ifmode) == ILI9341_IFMODE_LEN, \
88+ "ili9341: Error length frame rate control (IFMODE) register"); \
8089 BUILD_ASSERT(DT_PROP_LEN(DT_INST(n, ilitek_ili9341), frmctr1) == ILI9341_FRMCTR1_LEN, \
8190 "ili9341: Error length frame rate control (FRMCTR1) register"); \
8291 BUILD_ASSERT(DT_PROP_LEN(DT_INST(n, ilitek_ili9341), disctrl) == ILI9341_DISCTRL_LEN, \
@@ -108,10 +117,13 @@ struct ili9341_regs {
108117 "ili9341: Error length Pump ratio control (PUMPRATIOCTRL) register"); \
109118 BUILD_ASSERT(DT_PROP_LEN(DT_INST(n, ilitek_ili9341), enable3g) == ILI9341_ENABLE3G_LEN, \
110119 "ili9341: Error length enable 3G (ENABLE3G) register"); \
120+ BUILD_ASSERT(DT_PROP_LEN(DT_INST(n, ilitek_ili9341), ifctl) == ILI9341_IFCTL_LEN, \
121+ "ili9341: Error length frame rate control (IFCTL) register"); \
111122 BUILD_ASSERT(DT_PROP_LEN(DT_INST(n, ilitek_ili9341), etmod) == ILI9341_ETMOD_LEN, \
112123 "ili9341: Error length entry Mode Set (ETMOD) register"); \
113124 static const struct ili9341_regs ili9xxx_regs_##n = { \
114125 .gamset = DT_PROP(DT_INST(n, ilitek_ili9341), gamset), \
126+ .ifmode = DT_PROP(DT_INST(n, ilitek_ili9341), ifmode), \
115127 .frmctr1 = DT_PROP(DT_INST(n, ilitek_ili9341), frmctr1), \
116128 .disctrl = DT_PROP(DT_INST(n, ilitek_ili9341), disctrl), \
117129 .pwctrl1 = DT_PROP(DT_INST(n, ilitek_ili9341), pwctrl1), \
@@ -127,6 +139,7 @@ struct ili9341_regs {
127139 .timctrlb = DT_PROP(DT_INST(n, ilitek_ili9341), timctrlb), \
128140 .pumpratioctrl = DT_PROP(DT_INST(n, ilitek_ili9341), pumpratioctrl), \
129141 .enable3g = DT_PROP(DT_INST(n, ilitek_ili9341), enable3g), \
142+ .ifctl = DT_PROP(DT_INST(n, ilitek_ili9341), ifctl), \
130143 .etmod = DT_PROP(DT_INST(n, ilitek_ili9341), etmod), \
131144 }
132145
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