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sylvioalvesnashif
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drivers: gpio: esp32: use rtcio to config pins
Set gpio driver to use RTCIO interface to configure output strength of necessary output pins. Signed-off-by: Sylvio Alves <[email protected]>
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drivers/gpio/gpio_esp32.c

Lines changed: 40 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -13,6 +13,7 @@
1313
#include <soc/soc.h>
1414
#include <hal/gpio_ll.h>
1515
#include <esp_attr.h>
16+
#include <hal/rtc_io_hal.h>
1617

1718
#include <soc.h>
1819
#include <errno.h>
@@ -48,6 +49,10 @@ LOG_MODULE_REGISTER(gpio_esp32, CONFIG_LOG_DEFAULT_LEVEL);
4849
#define ISR_HANDLER intr_handler_t
4950
#endif
5051

52+
#ifndef SOC_GPIO_SUPPORT_RTC_INDEPENDENT
53+
#define SOC_GPIO_SUPPORT_RTC_INDEPENDENT 0
54+
#endif
55+
5156
struct gpio_esp32_config {
5257
/* gpio_driver_config needs to be first */
5358
struct gpio_driver_config drv_cfg;
@@ -63,6 +68,15 @@ struct gpio_esp32_data {
6368
sys_slist_t cb;
6469
};
6570

71+
static inline bool rtc_gpio_is_valid_gpio(uint32_t gpio_num)
72+
{
73+
#if SOC_RTCIO_INPUT_OUTPUT_SUPPORTED
74+
return (gpio_num < SOC_GPIO_PIN_COUNT && rtc_io_num_map[gpio_num] >= 0);
75+
#else
76+
return false;
77+
#endif
78+
}
79+
6680
static inline bool gpio_pin_is_valid(uint32_t pin)
6781
{
6882
return ((BIT(pin) & SOC_GPIO_VALID_GPIO_MASK) != 0);
@@ -97,6 +111,12 @@ static int gpio_esp32_config(const struct device *dev,
97111

98112
key = irq_lock();
99113

114+
#if SOC_RTCIO_INPUT_OUTPUT_SUPPORTED
115+
if (rtc_gpio_is_valid_gpio(io_pin)) {
116+
rtcio_hal_function_select(rtc_io_num_map[io_pin], RTCIO_FUNC_DIGITAL);
117+
}
118+
#endif
119+
100120
/* Set pin function as GPIO */
101121
ret = pinmux_pin_set(data->pinmux, io_pin, PIN_FUNC_GPIO);
102122
if (ret < 0) {
@@ -142,10 +162,28 @@ static int gpio_esp32_config(const struct device *dev,
142162
*/
143163
switch (flags & GPIO_DS_MASK) {
144164
case GPIO_DS_DFLT:
145-
gpio_ll_set_drive_capability(cfg->gpio_base, io_pin, GPIO_DRIVE_CAP_3);
165+
if (!rtc_gpio_is_valid_gpio(io_pin) || SOC_GPIO_SUPPORT_RTC_INDEPENDENT) {
166+
gpio_ll_set_drive_capability(cfg->gpio_base,
167+
io_pin,
168+
GPIO_DRIVE_CAP_3);
169+
} else {
170+
#if SOC_RTCIO_INPUT_OUTPUT_SUPPORTED
171+
rtcio_hal_set_drive_capability(rtc_io_num_map[io_pin],
172+
GPIO_DRIVE_CAP_3);
173+
#endif
174+
}
146175
break;
147176
case GPIO_DS_ALT:
148-
gpio_ll_set_drive_capability(cfg->gpio_base, io_pin, GPIO_DRIVE_CAP_0);
177+
if (!rtc_gpio_is_valid_gpio(io_pin) || SOC_GPIO_SUPPORT_RTC_INDEPENDENT) {
178+
gpio_ll_set_drive_capability(cfg->gpio_base,
179+
io_pin,
180+
GPIO_DRIVE_CAP_0);
181+
} else {
182+
#if SOC_RTCIO_INPUT_OUTPUT_SUPPORTED
183+
rtcio_hal_set_drive_capability(rtc_io_num_map[io_pin],
184+
GPIO_DRIVE_CAP_0);
185+
#endif
186+
}
149187
break;
150188
default:
151189
ret = -EINVAL;

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