dts: arm: renesas: ra: Correct MSTPD bit for PWM on ra4-cm4

Correct the MSTPD bit for PWM on ra4-cm4 soc

Signed-off-by: Khoa Nguyen <[email protected]>

Author: khoa-nguyen-18

dts/arm/renesas/ra/ra4/r7fa4m1ab3cfp.dtsi

@@ -312,3 +312,11 @@
 	port-irq12-pins = <2>;
 	port-irq14-pins = <5>;
 };
+
+&pwm2 {
+	clocks = <&pclkd MSTPD 6>;
+};
+
+&pwm3 {
+	clocks = <&pclkd MSTPD 6>;
+};

dts/arm/renesas/ra/ra4/r7fa4w1ad2cng.dtsi

@@ -229,3 +229,11 @@
 	port-irq-names = "port-irq11";
 	port-irq11-pins = <1>;
 };
+
+&pwm2 {
+	clocks = <&pclkd MSTPD 5>;
+};
+
+&pwm3 {
+	clocks = <&pclkd MSTPD 5>;
+};

dts/arm/renesas/ra/ra4/ra4-cm4-common.dtsi

@@ -362,7 +362,6 @@
 			compatible = "renesas,ra-pwm";
 			divider = <RA_PWM_SOURCE_DIV_1>;
 			channel = <RA_PWM_CHANNEL_2>;
-			clocks = <&pclkd MSTPD 5>;
 			reg = <0x40078200 0x100>;
 			#pwm-cells = <3>;
 			status = "disabled";
@@ -372,7 +371,6 @@
 			compatible = "renesas,ra-pwm";
 			divider = <RA_PWM_SOURCE_DIV_1>;
 			channel = <RA_PWM_CHANNEL_3>;
-			clocks = <&pclkd MSTPD 5>;
 			reg = <0x40078300 0x100>;
 			#pwm-cells = <3>;
 			status = "disabled";
@@ -382,7 +380,7 @@
 			compatible = "renesas,ra-pwm";
 			divider = <RA_PWM_SOURCE_DIV_1>;
 			channel = <RA_PWM_CHANNEL_4>;
-			clocks = <&pclkd MSTPD 5>;
+			clocks = <&pclkd MSTPD 6>;
 			reg = <0x40078400 0x100>;
 			#pwm-cells = <3>;
 			status = "disabled";