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boards: st: Add stm32wba65i-dk1
Add stm32wba65i-dk1 board support with UART console, LEDs, joystick keys using ADC channel 6. Board YAML file does not list 'supported' tags since the board is very similar to nucleo_wba65ri for which supported features are already covered. Signed-off-by: Etienne Carriere <[email protected]>
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‎boards/st/stm32wba65i_dk1/Kconfig.defconfig‎

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# STM32WBA65I Discovery kit board configuration
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# Copyright (c) 2025 STMicroelectronics
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# SPDX-License-Identifier: Apache-2.0
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if BOARD_STM32WBA65I_DK1
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config SPI_STM32_INTERRUPT
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default y
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depends on SPI
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endif # BOARD_STM32WBA65I_DK1

‎boards/st/stm32wba65i_dk1/Kconfig.stm32wba65i_dk1‎

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# Copyright (c) 2025 STMicroelectronics
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# SPDX-License-Identifier: Apache-2.0
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config BOARD_STM32WBA65I_DK1
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select SOC_STM32WBA65XX

‎boards/st/stm32wba65i_dk1/arduino_r3_connector.dtsi‎

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/*
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* Copyright (c) 2025 STMicroelectronics
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include <zephyr/dt-bindings/gpio/arduino-header-r3.h>
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/ {
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arduino_header: connector {
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compatible = "arduino-header-r3";
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#gpio-cells = <2>;
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gpio-map-mask = <0xffffffff 0xffffffc0>;
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gpio-map-pass-thru = <0 0x3f>;
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gpio-map = <ARDUINO_HEADER_R3_A0 0 &gpioa 4 0>,
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<ARDUINO_HEADER_R3_A1 0 &gpioa 6 0>,
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<ARDUINO_HEADER_R3_A2 0 &gpioa 2 0>,
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<ARDUINO_HEADER_R3_A3 0 &gpioa 1 0>,
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<ARDUINO_HEADER_R3_A4 0 &gpioa 5 0>,
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<ARDUINO_HEADER_R3_A5 0 &gpioa 0 0>,
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<ARDUINO_HEADER_R3_D0 0 &gpioa 11 0>,
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<ARDUINO_HEADER_R3_D1 0 &gpioa 12 0>,
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<ARDUINO_HEADER_R3_D2 0 &gpioe 0 0>,
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<ARDUINO_HEADER_R3_D3 0 &gpiob 13 0>,
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<ARDUINO_HEADER_R3_D4 0 &gpioa 3 0>,
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<ARDUINO_HEADER_R3_D5 0 &gpiob 14 0>,
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<ARDUINO_HEADER_R3_D6 0 &gpiob 0 0>,
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<ARDUINO_HEADER_R3_D7 0 &gpiod 14 0>,
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<ARDUINO_HEADER_R3_D8 0 &gpioa 10 0>,
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<ARDUINO_HEADER_R3_D9 0 &gpiob 11 0>,
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<ARDUINO_HEADER_R3_D10 0 &gpiob 9 0>,
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<ARDUINO_HEADER_R3_D11 0 &gpioc 3 0>,
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<ARDUINO_HEADER_R3_D12 0 &gpioa 9 0>,
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<ARDUINO_HEADER_R3_D13 0 &gpiob 10 0>,
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<ARDUINO_HEADER_R3_D14 0 &gpiob 1 0>,
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<ARDUINO_HEADER_R3_D15 0 &gpiob 2 0>;
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};
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};
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arduino_i2c: &i2c1 {};
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arduino_spi: &spi1 {};

‎boards/st/stm32wba65i_dk1/board.cmake‎

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# Copyright (c) 2025 STMicroelectronics
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# SPDX-License-Identifier: Apache-2.0
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board_runner_args(stm32cubeprogrammer "--port=swd" "--reset-mode=hw")
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include(${ZEPHYR_BASE}/boards/common/stm32cubeprogrammer.board.cmake)
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include(${ZEPHYR_BASE}/boards/common/openocd-stm32.board.cmake)

‎boards/st/stm32wba65i_dk1/board.yml‎

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board:
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name: stm32wba65i_dk1
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full_name: STM32WBA65I Discovery kit
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vendor: st
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socs:
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- name: stm32wba65xx

‎boards/st/stm32wba65i_dk1/doc/img/stm32wba65i-dk1.webp‎

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‎boards/st/stm32wba65i_dk1/doc/index.rst‎

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.. zephyr:board:: stm32wba65i_dk1
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Overview
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********
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STM32WBA65I-DK1 is a Bluetooth |reg| Low Energy, 802.15.4 and Zigbee |reg|
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wireless and ultra-low-power board embedding a powerful and ultra-low-power
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radio compliant with the Bluetooth |reg| Low Energy SIG specification v5.4
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with IEEE 802.15.4-2015 and Zigbee |reg| specifications.
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The ARDUINO |reg| Uno V3 connectivity support and the ST morpho headers allow
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the easy expansion of the functionality of the STM32 Discovery kit open
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development platform with a wide choice of specialized shields.
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- Ultra-low-power wireless STM32WBA65RI microcontroller based on the Arm |reg|
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Cortex |reg| ‑M33 core with TrustZone |reg|, MPU, DSP, and FPU, that operates
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at a frequency of up to 100 MHz, featuring 2 Mbyte of flash memory and 512
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Kbytes of SRAM in a VFQFPN68 package
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- MCU RF board (MB2130):
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- 2.4 GHz RF transceiver supporting Bluetooth |reg| specification v5.4
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- Arm |reg| Cortex |reg| M33 CPU with TrustZone |reg|, MPU, DSP, and FPU
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- Integrated PCB antenna
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- Three user LEDs (incl. one default not connected)
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- One reset push-buttons
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- One Joystick
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- Board connectors:
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- 2 USB Type-C
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- ARDUINO |reg| Uno V3 expansion connector
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- ST morpho headers for full access to all STM32 I/Os
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- Flexible power-supply options: ST-LINK USB VBUS or external sources
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- On-board STLINK-V3MODS debugger/programmer with USB re-enumeration capability:
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mass storage, Virtual COM port, and debug port
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Hardware
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********
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The STM32WBA65xx multiprotocol wireless and ultralow power devices embed a
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powerful and ultralow power radio compliant with the Bluetooth |reg| SIG Low
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Energy specification 5.4.
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- Includes ST state-of-the-art patented technology
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- Ultra low power radio:
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- 2.4 GHz radio
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- RF transceiver supporting Bluetooth |reg| Low Energy 5.4 specification
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IEEE 802.15.4-2015 PHY and MAC, supporting Thread, Matter and Zigbee |reg|
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- Proprietary protocols
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- RX sensitivity: -96 dBm (Bluetooth |reg| Low Energy at 1 Mbps)
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and -100 dBm (IEEE 802.15.4 at 250 kbps)
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- Programmable output power, up to +10 dBm with 1 dB steps
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- Support for external PA
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- Integrated balun to reduce BOM
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- Suitable for systems requiring compliance with radio frequency regulations
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ETSI EN 300 328, EN 300 440, FCC CFR47 Part 15 and ARIB STD-T66
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- Ultra low power platform with FlexPowerControl:
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- 1.71 to 3.6 V power supply
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- - 40 °C to 85 °C temperature range
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- Autonomous peripherals with DMA, functional down to Stop 1 mode
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- 120 nA Standby mode (16 wake-up pins)
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- 1.68 |micro| A Standby mode with 64 KB SRAM with RTC
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- 5.58 |micro| A Stop 2 mode with 64 KB SRAM with RTC
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- 28.75 |micro| A/MHz Run mode at 3.3 V
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- Radio: Rx 4.26 mA / Tx at 0 dBm 5.94 mA
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- ART Accelerator |trade|: 8-Kbyte instruction cache allowing 0-wait-state execution
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from flash memory (frequency up to 100 MHz, 150 DMIPS)
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- Power management: embedded regulator LDO and SMPS step-down converter
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- Supporting switch on-the-fly and voltage scaling
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- Benchmarks:
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- 1.5 DMIPS/MHz (Drystone 2.1)
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- 410 CoreMark |reg| (4.10 CoreMark/MHz)
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- Clock sources:
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- 32 MHz crystal oscillator
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- 32 kHz crystal oscillator (LSE)
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- Internal low-power 32 kHz (±5%) RC
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- Internal 16 MHz factory trimmed RC (±1%)
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- PLL for system clock and ADC
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- Memories:
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- 2 MB flash memory with ECC, including 256 Kbytes with 100 cycles
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- 512 KB SRAM, including 64 KB with parity check
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- 512-byte (32 rows) OTP
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- Rich analog peripherals (independent supply):
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- 12-bit ADC 2.5 Msps with hardware oversampling
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- Communication peripherals:
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- Four UARTs (ISO 7816, IrDA, modem)
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- Three SPIs
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- Four I2C Fm+ (1 Mbit/s), SMBus/PMBus |reg|
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- System peripherals:
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- Touch sensing controller, up to 24 sensors, supporting touch key, linear,
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rotary touch sensors
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- One 16-bit, advanced motor control timer
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- Three 16-bit timers
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- Two 32-bit timer
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- Two low-power 16-bit timers (available in Stop mode)
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- Two Systick timers
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- RTC with hardware calendar and calibration
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- Two watchdogs
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- 8-channel DMA controller, functional in Stop mode
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- Security and cryptography:
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- Arm |reg| TrustZone |reg| and securable I/Os, memories, and peripherals
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- Flexible life cycle scheme with RDP and password protected debug
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- Root of trust thanks to unique boot entry and secure hide protection area (HDP)
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- SFI (secure firmware installation) thanks to embedded RSS (root secure services)
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- Secure data storage with root hardware unique key (RHUK)
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- Secure firmware upgrade support with TF-M
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- Two AES co-processors, including one with DPA resistance
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- Public key accelerator, DPA resistant
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- HASH hardware accelerator
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- True random number generator, NIST SP800-90B compliant
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- 96-bit unique ID
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- Active tampers
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- CRC calculation unit
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- Up to 86 I/Os (most of them 5 V-tolerant) with interrupt capability
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- Development support:
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- Serial wire debug (SWD), JTAG, Embedded Trace Macrocell |trade|
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- ECOPACK2 compliant package
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More information about STM32WBA series can be found here:
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- `STM32WBA Series on www.st.com`_
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Supported Features
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==================
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.. zephyr:board-supported-hw::
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Connections and IOs
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===================
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STM32WBA65I-DK1 board has 4 GPIO controllers. These controllers are responsible for pin muxing,
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input/output, pull-up, etc.
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Default Zephyr Peripheral Mapping:
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----------------------------------
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.. rst-class:: rst-columns
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- USART_1 TX/RX : PB12/PA8
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- I2C_1_SCL : PB2
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- I2C_1_SDA : PB1
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- LD6 : PD8
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- SPI_1_NSS : PA12 (arduino_spi)
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- SPI_1_SCK : PB4 (arduino_spi)
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- SPI_1_MISO : PB3 (arduino_spi)
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- SPI_1_MOSI : PA15 (arduino_spi)
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System Clock
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------------
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STM32WBA65I-DK1 System Clock could be driven by internal or external oscillator,
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as well as main PLL clock. By default System clock is driven by HSE+PLL clock at 100MHz.
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Serial Port
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-----------
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STM32WBA65I-DK1 board has 3 U(S)ARTs. The Zephyr console output is assigned to USART1.
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Default settings are 115200 8N1.
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Programming and Debugging
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*************************
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.. zephyr:board-supported-runners::
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STM32WBA65I-DK1 board includes an ST-LINK/V3 embedded debug tool interface.
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It could be used for flash and debug using STM32Cube ecosystem tools.
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Flashing
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========
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The board is configured to be flashed using west `STM32CubeProgrammer`_ runner,
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so its :ref:`installation <stm32cubeprog-flash-host-tools>` is required.
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Flashing an application to a STM32WBA65I-DK1
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--------------------------------------------
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Here is an example for the :zephyr:code-sample:`blinky` application.
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.. zephyr-app-commands::
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:zephyr-app: samples/basic/blinky
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:board: stm32wba65i_dk1
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:goals: build flash
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You will see the LED blinking every second.
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Debugging
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=========
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Debugging using OpenOCD
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-----------------------
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You can debug an application in the usual way using OpenOCD. Here is an example for the
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:zephyr:code-sample:`blinky` application.
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.. zephyr-app-commands::
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:zephyr-app: samples/basic/blinky
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:board: stm32wba65i_dk1
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:maybe-skip-config:
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:goals: debug
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.. _STM32WBA Series on www.st.com:
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https://www.st.com/en/microcontrollers-microprocessors/stm32wba-series.html
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.. _STM32CubeProgrammer:
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https://www.st.com/en/development-tools/stm32cubeprog.html

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