boards: nxp: imx95_evk: add board init for NETC

Added board init for NETC.

Signed-off-by: Yangbo Lu <[email protected]>

Author: yangbolu1991

boards/nxp/imx95_evk/CMakeLists.txt

@@ -11,3 +11,6 @@ if (CONFIG_SOF AND CONFIG_BOARD_IMX95_EVK_MIMX9596_M7_DDR)
     DEPENDS ${CMAKE_BINARY_DIR}/zephyr/${KERNEL_ELF_NAME}
   )
 endif()
+
+zephyr_library()
+zephyr_library_sources(board.c)

boards/nxp/imx95_evk/board.c

@@ -0,0 +1,36 @@
+/*
+ * Copyright 2024 NXP
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#include <zephyr/devicetree.h>
+#include <zephyr/init.h>
+#include <zephyr/kernel.h>
+#include <soc.h>
+
+static int board_init(void)
+{
+#if defined(CONFIG_ETH_NXP_IMX_NETC) && (DT_CHILD_NUM_STATUS_OKAY(DT_NODELABEL(netc)) != 0)
+	/* Port 0 to 2 protocol configure: RGMII, RGMII, XGMII */
+	BLK_CTRL_NETCMIX->CFG_LINK_MII_PROT = 0x00000522;
+	BLK_CTRL_NETCMIX->CFG_LINK_PCS_PROT_2 = 0x00000040;
+
+	/* Unlock the IERB. It will warm reset whole NETC. */
+	NETC_PRIV->NETCRR &= ~NETC_PRIV_NETCRR_LOCK_MASK;
+	while ((NETC_PRIV->NETCRR & NETC_PRIV_NETCRR_LOCK_MASK) != 0U) {
+	}
+
+	/* Lock the IERB. */
+	NETC_PRIV->NETCRR |= NETC_PRIV_NETCRR_LOCK_MASK;
+	while ((NETC_PRIV->NETCSR & NETC_PRIV_NETCSR_STATE_MASK) != 0U) {
+	}
+#endif
+	return 0;
+}
+
+/*
+ * Because platform is using ARM SCMI, drivers like scmi, mbox etc. are
+ * initialized during PRE_KERNEL_1. Common init hooks is not able to use.
+ * SoC early init and board early init could be run during PRE_KERNEL_2 instead.
+ */
+SYS_INIT(board_init, PRE_KERNEL_2, 10);