drivers: ethernet: dwc_xgmac: Added dwc-xgmac

 ethernet driver

This driver is capable of supporting basic features
of synposys dwc-xgmac ethernet MAC IP. Basic features
includes,
1. Tx and Rx, multiple Tx and Rx DMA channels, multiple
   Tx and Rx queues
2. Check Sum Offloading on Tx and Rx for IPv4, IPv6,
   TCP, UDP and ICMP packets
3. 10M/100M/1G speeds, Autonegotiation, Link speed
   configuration, Promiscuous mode, Full/Half
   duplex configuration
4. Added source files for synopsys dwc xgmac mdio driver.
   synopsys dwc xgmac mdio driver fetures includes:
   It supports clause 22 of IEEE 802.3 for ethernet PHY devices
   management.
5. Extended mdio shell support for dwcxgmac mdio driver.

Signed-off-by: Santosh Male <[email protected]>

Author: Smale-12048867

drivers/ethernet/CMakeLists.txt

@@ -67,3 +67,4 @@ endif()
 add_subdirectory(phy)
 add_subdirectory(eth_nxp_enet_qos)
 add_subdirectory(nxp_enet)
+add_subdirectory(dwc_xgmac)

drivers/ethernet/Kconfig

@@ -76,6 +76,7 @@ source "drivers/ethernet/Kconfig.xmc4xxx"
 
 source "drivers/ethernet/eth_nxp_enet_qos/Kconfig"
 
+source "drivers/ethernet/dwc_xgmac/Kconfig"
 source "drivers/ethernet/phy/Kconfig"
 
 source "drivers/ethernet/nxp_enet/Kconfig"

drivers/ethernet/dwc_xgmac/CMakeLists.txt

@@ -0,0 +1,4 @@
+# Copyright (c) 2024 Intel Corporation
+# SPDX-License-Identifier: Apache-2.0
+
+zephyr_library_sources_ifdef(CONFIG_ETH_DWC_XGMAC eth_dwc_xgmac.c)

drivers/ethernet/dwc_xgmac/Kconfig

@@ -0,0 +1,87 @@
+#
+# Synopsys DesignWare XGMAC configuration options
+#
+# Copyright(c) 2024, Intel Corporation
+# SPDX-License-Identifier: Apache-2.0
+#
+
+DT_COMPAT_DWC_XGMAC := snps,dwcxgmac
+
+menu "DWC XGMAC configuration"
+
+config ETH_DWC_XGMAC
+	bool "Synopsys DesignWareCore XGMAC Ethernet driver"
+	default y
+	depends on DT_HAS_SNPS_DWCXGMAC_ENABLED
+	help
+	  This is a driver for the Synopsys DesignWare XGMAC, also referred to
+	  as "DesignWare Cores Ethernet XGMAC". Hardware versions
+	  3.x are supported.
+
+	  Platform specific glue support is also required. This driver is
+	  currently available on targets using the Intel Agilex5 series.
+
+if  ETH_DWC_XGMAC
+
+config ETH_DWC_XGMAC_BOTTOM_HALF_WORK_QUEUE
+	bool "IRQ Bottom Half work Queue"
+	default y
+
+config ETH_DWC_XGMAC_SW_RESET_TIMEOUT
+	int "A timeout value in us to check software reset status"
+	default 1000
+	help
+	  A timeout value in ms to check software reset status
+
+config ETH_DWC_XGMAC_POLLING_MODE
+	bool "Polling mode"
+
+config ETH_DWC_XGMAC_INTERRUPT_POLLING_INTERVAL_US
+	int "XGMAC interrupt polling interval in us"
+	default 500
+	depends on ETH_DWC_XGMAC_POLLING_MODE
+	help
+	  XGMAC interrupt polling interval in us
+
+config ETH_XGMAC_MAX_QUEUES
+	int
+	default 8
+	help
+	  Number hardware queues supported by the XGMAC IP
+
+config ETH_DWC_XGMAC_RX_CS_OFFLOAD
+	bool "RX checksum offload"
+	default y
+	help
+	  Enable receive checksum offload for TCP/UDP/IP packets
+
+config ETH_DWC_XGMAC_TX_CS_OFFLOAD
+	bool "TX checksum offload"
+	default y
+	help
+	  Enable transmit checksum offload for TCP/UDP/IP packets
+
+config ETH_DWC_XGMAC_PROMISCUOUS_EXCEPTION
+	bool "Promiscuous mode"
+	depends on NET_PROMISCUOUS_MODE
+	help
+	  Disables the promiscuous mode support in XGMAC device.
+
+config ETH_DWC_XGMAC_HW_FILTERING
+	bool "H/W L2 Filtering"
+	help
+	  Enable Hardware support for L2 filtering of packets.
+
+config ETH_DWC_XGMAC_HW_L3_L4_FILTERING
+	bool "H/W L3 L4 Filtering"
+	help
+	  Enable Hardware support for L3 L4 filtering of packets.
+
+config ETH_DWC_XGMAC_ARP_OFFLOAD
+	bool "ARP Offload"
+	help
+	  Enable ARP hardware offloading support.
+
+endif # ETH_DWC_XGMAC
+
+endmenu