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drivers: counter: added ctimer driver for lpcexpresso55s69
Added shim driver for the CTIMERs for the lpcexpresso55s69 board. Fixes: #22705 Signed-off-by: Toby Firth <[email protected]>
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21 files changed

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-7
lines changed

‎boards/arm/lpcxpresso55s69/doc/index.rst‎

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@@ -82,6 +82,8 @@ features:
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+-----------+------------+-------------------------------------+
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| USB | on-chip | USB device |
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+-----------+------------+-------------------------------------+
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| COUNTER | on-chip | counter |
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+-----------+------------+-------------------------------------+
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8688
Targets available
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==================

‎boards/arm/lpcxpresso55s69/lpcxpresso55s69_cpu0.dts‎

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@@ -109,3 +109,23 @@
109109
zephyr_udc0: &usbhs {
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status = "okay";
111111
};
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&ctimer0 {
114+
status = "okay";
115+
};
116+
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&ctimer1 {
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status = "okay";
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};
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&ctimer2 {
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status = "okay";
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};
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&ctimer3 {
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status = "okay";
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};
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&ctimer4 {
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status = "okay";
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};

‎boards/arm/lpcxpresso55s69/lpcxpresso55s69_cpu0.yaml‎

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@@ -19,6 +19,7 @@ supported:
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- arduino_i2c
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- arduino_serial
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- arduino_spi
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- counter
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- gpio
2324
- i2c
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- spi

‎boards/arm/lpcxpresso55s69/lpcxpresso55s69_ns.dts‎

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@@ -107,3 +107,23 @@
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zephyr_udc0: &usbhs {
108108
status = "okay";
109109
};
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&ctimer0 {
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status = "okay";
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};
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&ctimer1 {
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status = "okay";
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};
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&ctimer2 {
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status = "okay";
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};
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&ctimer3 {
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status = "okay";
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};
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&ctimer4 {
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status = "okay";
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};

‎boards/arm/lpcxpresso55s69/lpcxpresso55s69_ns.yaml‎

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@@ -17,6 +17,7 @@ toolchain:
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supported:
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- adc
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- arduino_spi
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- counter
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- dma
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- gpio
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- spi

‎drivers/clock_control/clock_control_mcux_syscon.c‎

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Original file line numberDiff line numberDiff line change
@@ -34,7 +34,8 @@ static int mcux_lpc_syscon_clock_control_get_subsys_rate(
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{
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#if defined(CONFIG_I2C_MCUX_FLEXCOMM) || \
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defined(CONFIG_SPI_MCUX_FLEXCOMM) || \
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defined(CONFIG_UART_MCUX_FLEXCOMM)
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defined(CONFIG_UART_MCUX_FLEXCOMM) || \
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defined(CONFIG_COUNTER_MCUX_CTIMER)
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3940
uint32_t clock_name = (uint32_t) sub_system;
4041

@@ -79,6 +80,23 @@ static int mcux_lpc_syscon_clock_control_get_subsys_rate(
7980
case MCUX_USDHC2_CLK:
8081
*rate = CLOCK_GetSdioClkFreq(1);
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break;
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#endif
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#if defined(CONFIG_COUNTER_MCUX_CTIMER)
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case (MCUX_CTIMER0_CLK + MCUX_CTIMER_CLK_OFFSET):
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*rate = CLOCK_GetCTimerClkFreq(0);
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break;
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case (MCUX_CTIMER1_CLK + MCUX_CTIMER_CLK_OFFSET):
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*rate = CLOCK_GetCTimerClkFreq(1);
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break;
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case (MCUX_CTIMER2_CLK + MCUX_CTIMER_CLK_OFFSET):
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*rate = CLOCK_GetCTimerClkFreq(2);
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break;
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case (MCUX_CTIMER3_CLK + MCUX_CTIMER_CLK_OFFSET):
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*rate = CLOCK_GetCTimerClkFreq(3);
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break;
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case (MCUX_CTIMER4_CLK + MCUX_CTIMER_CLK_OFFSET):
98+
*rate = CLOCK_GetCTimerClkFreq(4);
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break;
82100
#endif
83101
}
84102
#endif

‎drivers/counter/CMakeLists.txt‎

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Original file line numberDiff line numberDiff line change
@@ -6,6 +6,7 @@ zephyr_library_sources_ifdef(CONFIG_TIMER_TMR_CMSDK_APB timer_tmr_cmsdk_
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zephyr_library_sources_ifdef(CONFIG_TIMER_DTMR_CMSDK_APB timer_dtmr_cmsdk_apb.c)
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zephyr_library_sources_ifdef(CONFIG_COUNTER_GECKO_RTCC counter_gecko_rtcc.c)
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zephyr_library_sources_ifdef(CONFIG_COUNTER_IMX_EPIT counter_imx_epit.c)
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zephyr_library_sources_ifdef(CONFIG_COUNTER_MCUX_CTIMER counter_mcux_ctimer.c)
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zephyr_library_sources_ifdef(CONFIG_COUNTER_MCUX_RTC counter_mcux_rtc.c)
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zephyr_library_sources_ifdef(CONFIG_COUNTER_MCUX_LPC_RTC counter_mcux_lpc_rtc.c)
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zephyr_library_sources_ifdef(CONFIG_COUNTER_NRF_TIMER counter_nrfx_timer.c)

‎drivers/counter/Kconfig‎

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Original file line numberDiff line numberDiff line change
@@ -54,4 +54,6 @@ source "drivers/counter/Kconfig.esp32"
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source "drivers/counter/Kconfig.mcp7940n"
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source "drivers/counter/Kconfig.mcux_ctimer"
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endif # COUNTER

‎drivers/counter/Kconfig.mcux_ctimer‎

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Original file line numberDiff line numberDiff line change
@@ -0,0 +1,10 @@
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# MCUXpresso SDK CTIMER
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# Copyright (c) 2021 Toby firth
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# SPDX-License-Identifier: Apache-2.0
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config COUNTER_MCUX_CTIMER
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bool "MCUX CTIMER driver"
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depends on HAS_MCUX_CTIMER
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help
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Enable support for MCUX CTIMER driver.

‎drivers/counter/counter_mcux_ctimer.c‎

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Original file line numberDiff line numberDiff line change
@@ -0,0 +1,251 @@
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/*
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* Copyright (c) 2021, Toby Firth.
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*
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* SPDX-License-Identifier: Apache-2.0
5+
*/
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#define DT_DRV_COMPAT nxp_lpc_ctimer
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#include <drivers/counter.h>
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#include <fsl_ctimer.h>
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#include <logging/log.h>
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#include <drivers/clock_control.h>
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#include <dt-bindings/clock/mcux_lpc_syscon_clock.h>
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LOG_MODULE_REGISTER(mcux_ctimer, CONFIG_COUNTER_LOG_LEVEL);
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#define NUM_CHANNELS 4
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struct mcux_lpc_ctimer_channel_data {
18+
counter_alarm_callback_t alarm_callback;
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void *alarm_user_data;
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};
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struct mcux_lpc_ctimer_data {
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struct mcux_lpc_ctimer_channel_data channels[NUM_CHANNELS];
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};
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struct mcux_lpc_ctimer_config {
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struct counter_config_info info;
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CTIMER_Type *base;
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const struct device *clock_dev;
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clock_control_subsys_t clock_subsys;
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ctimer_timer_mode_t mode;
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ctimer_capture_channel_t input;
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uint32_t prescale;
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void (*irq_config_func)(const struct device *dev);
35+
};
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static int mcux_lpc_ctimer_start(const struct device *dev)
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{
39+
const struct mcux_lpc_ctimer_config *config = dev->config;
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CTIMER_StartTimer(config->base);
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return 0;
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}
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static int mcux_lpc_ctimer_stop(const struct device *dev)
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{
48+
const struct mcux_lpc_ctimer_config *config = dev->config;
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CTIMER_StopTimer(config->base);
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return 0;
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}
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static uint32_t mcux_lpc_ctimer_read(CTIMER_Type *base)
56+
{
57+
return CTIMER_GetTimerCountValue(base);
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}
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static int mcux_lpc_ctimer_get_value(const struct device *dev, uint32_t *ticks)
61+
{
62+
const struct mcux_lpc_ctimer_config *config = dev->config;
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*ticks = mcux_lpc_ctimer_read(config->base);
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return 0;
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}
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static int mcux_lpc_ctimer_set_alarm(const struct device *dev, uint8_t chan_id,
68+
const struct counter_alarm_cfg *alarm_cfg)
69+
{
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const struct mcux_lpc_ctimer_config *config = dev->config;
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struct mcux_lpc_ctimer_data *data = dev->data;
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uint32_t ticks = alarm_cfg->ticks;
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uint32_t current = mcux_lpc_ctimer_read(config->base);
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76+
if (data->channels[chan_id].alarm_callback != NULL) {
77+
LOG_ERR("channel already in use");
78+
return -EBUSY;
79+
}
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81+
if ((alarm_cfg->flags & COUNTER_ALARM_CFG_ABSOLUTE) == 0) {
82+
ticks += current;
83+
}
84+
85+
data->channels[chan_id].alarm_callback = alarm_cfg->callback;
86+
data->channels[chan_id].alarm_user_data = alarm_cfg->user_data;
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ctimer_match_config_t match_config = { .matchValue = ticks,
89+
.enableCounterReset = false,
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.enableCounterStop = false,
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.outControl = kCTIMER_Output_NoAction,
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.outPinInitState = false,
93+
.enableInterrupt = true };
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95+
CTIMER_SetupMatch(config->base, chan_id, &match_config);
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return 0;
98+
}
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static int mcux_lpc_ctimer_cancel_alarm(const struct device *dev, uint8_t chan_id)
101+
{
102+
const struct mcux_lpc_ctimer_config *config = dev->config;
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struct mcux_lpc_ctimer_data *data = dev->data;
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CTIMER_DisableInterrupts(config->base, (1 << chan_id));
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107+
data->channels[chan_id].alarm_callback = NULL;
108+
data->channels[chan_id].alarm_user_data = NULL;
109+
110+
return 0;
111+
}
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static int mcux_lpc_ctimer_set_top_value(const struct device *dev,
114+
const struct counter_top_cfg *cfg)
115+
{
116+
ARG_UNUSED(dev);
117+
ARG_UNUSED(cfg);
118+
return -ENOTSUP;
119+
}
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static uint32_t mcux_lpc_ctimer_get_pending_int(const struct device *dev)
122+
{
123+
const struct mcux_lpc_ctimer_config *config = dev->config;
124+
125+
return (CTIMER_GetStatusFlags(config->base) & 0xF) != 0;
126+
}
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static uint32_t mcux_lpc_ctimer_get_top_value(const struct device *dev)
129+
{
130+
const struct mcux_lpc_ctimer_config *config = dev->config;
131+
132+
return config->info.max_top_value;
133+
}
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static void mcux_lpc_ctimer_isr(const struct device *dev)
136+
{
137+
const struct mcux_lpc_ctimer_config *config = dev->config;
138+
struct mcux_lpc_ctimer_data *data = dev->data;
139+
140+
uint32_t interrupt_stat = CTIMER_GetStatusFlags(config->base);
141+
142+
CTIMER_ClearStatusFlags(config->base, interrupt_stat);
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144+
uint32_t ticks = mcux_lpc_ctimer_read(config->base);
145+
146+
for (uint8_t chan = 0; chan < NUM_CHANNELS; chan++) {
147+
uint8_t channel_mask = 0x01 << chan;
148+
149+
if (((interrupt_stat & channel_mask) != 0) &&
150+
(data->channels[chan].alarm_callback != NULL)) {
151+
counter_alarm_callback_t alarm_callback =
152+
data->channels[chan].alarm_callback;
153+
void *alarm_user_data = data->channels[chan].alarm_user_data;
154+
155+
data->channels[chan].alarm_callback = NULL;
156+
data->channels[chan].alarm_user_data = NULL;
157+
alarm_callback(dev, chan, ticks, alarm_user_data);
158+
}
159+
}
160+
}
161+
162+
static int mcux_lpc_ctimer_init(const struct device *dev)
163+
{
164+
/*
165+
* The frequency of the timer is not known at compile time so we need to
166+
* modify the timer's config in the init function at runtime when the
167+
* frequency is known.
168+
*/
169+
struct mcux_lpc_ctimer_config *config = (struct mcux_lpc_ctimer_config *)dev->config;
170+
struct mcux_lpc_ctimer_data *data = dev->data;
171+
172+
ctimer_config_t ctimer_config;
173+
174+
uint32_t clk_freq = 0;
175+
176+
if (clock_control_get_rate(config->clock_dev, config->clock_subsys,
177+
&clk_freq)) {
178+
LOG_ERR("unable to get clock frequency");
179+
return -EINVAL;
180+
}
181+
182+
/* prescale increments when the prescale counter is 0 so if prescale is 1
183+
* the counter is incremented every 2 cycles of the clock so will actually
184+
* divide by 2 hence the addition of 1 to the value here.
185+
*/
186+
uint32_t freq = clk_freq / (config->prescale + 1);
187+
188+
config->info.freq = freq;
189+
190+
for (uint8_t chan = 0; chan < NUM_CHANNELS; chan++) {
191+
data->channels[chan].alarm_callback = NULL;
192+
data->channels[chan].alarm_user_data = NULL;
193+
}
194+
195+
CTIMER_GetDefaultConfig(&ctimer_config);
196+
197+
ctimer_config.mode = config->mode;
198+
ctimer_config.input = config->input;
199+
ctimer_config.prescale = config->prescale;
200+
201+
CTIMER_Init(config->base, &ctimer_config);
202+
203+
config->irq_config_func(dev);
204+
205+
return 0;
206+
}
207+
208+
static const struct counter_driver_api mcux_ctimer_driver_api = {
209+
.start = mcux_lpc_ctimer_start,
210+
.stop = mcux_lpc_ctimer_stop,
211+
.get_value = mcux_lpc_ctimer_get_value,
212+
.set_alarm = mcux_lpc_ctimer_set_alarm,
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.cancel_alarm = mcux_lpc_ctimer_cancel_alarm,
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.set_top_value = mcux_lpc_ctimer_set_top_value,
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.get_pending_int = mcux_lpc_ctimer_get_pending_int,
216+
.get_top_value = mcux_lpc_ctimer_get_top_value,
217+
};
218+
219+
#define CTIMER_CLOCK_SOURCE(id) TO_CTIMER_CLOCK_SOURCE(id, DT_INST_PROP(id, clk_source))
220+
#define TO_CTIMER_CLOCK_SOURCE(id, val) MUX_A(CM_CTIMERCLKSEL##id, val)
221+
222+
#define COUNTER_LPC_CTIMER_DEVICE(id) \
223+
static void mcux_lpc_ctimer_irq_config_##id(const struct device *dev); \
224+
static struct mcux_lpc_ctimer_config mcux_lpc_ctimer_config_##id = { \
225+
.info = { \
226+
.max_top_value = UINT32_MAX, \
227+
.freq = 1, \
228+
.flags = COUNTER_CONFIG_INFO_COUNT_UP, \
229+
.channels = NUM_CHANNELS, \
230+
},\
231+
.base = (CTIMER_Type *)DT_INST_REG_ADDR(id), \
232+
.clock_dev = DEVICE_DT_GET(DT_INST_CLOCKS_CTLR(id)), \
233+
.clock_subsys = \
234+
(clock_control_subsys_t)(DT_INST_CLOCKS_CELL(id, name) + MCUX_CTIMER_CLK_OFFSET),\
235+
.mode = DT_INST_PROP(id, mode), \
236+
.input = DT_INST_PROP(id, input), \
237+
.prescale = DT_INST_PROP(id, prescale), \
238+
.irq_config_func = mcux_lpc_ctimer_irq_config_##id, \
239+
}; \
240+
static struct mcux_lpc_ctimer_data mcux_lpc_ctimer_data_##id; \
241+
DEVICE_DT_INST_DEFINE(id, &mcux_lpc_ctimer_init, NULL, &mcux_lpc_ctimer_data_##id, \
242+
&mcux_lpc_ctimer_config_##id, POST_KERNEL, \
243+
CONFIG_KERNEL_INIT_PRIORITY_DEVICE, &mcux_ctimer_driver_api); \
244+
static void mcux_lpc_ctimer_irq_config_##id(const struct device *dev) \
245+
{ \
246+
IRQ_CONNECT(DT_INST_IRQN(id), DT_INST_IRQ(id, priority), mcux_lpc_ctimer_isr, \
247+
DEVICE_DT_INST_GET(id), 0); \
248+
irq_enable(DT_INST_IRQN(id)); \
249+
}
250+
251+
DT_INST_FOREACH_STATUS_OKAY(COUNTER_LPC_CTIMER_DEVICE)

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