arch: arm: rename CPU_HAS_NXP_MPU to align with binding

manuargue · kartben · commit 87798f9e16c4 · 2024-12-06T22:23:06.000+01:00
Following the binding rename to "nxp,sysmpu", update the Kconfig
option to align with the binding name and to better reflect the
option's purpose.

Signed-off-by: Manuel Argüelles &lt;manuel.arguelles@nxp.com&gt;
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
@@ -155,12 +155,12 @@ config CPU_HAS_ARM_MPU
 	  This option is enabled when the CPU has a Memory Protection Unit (MPU)
 	  in ARM flavor.
 
-config CPU_HAS_NXP_MPU
+config CPU_HAS_NXP_SYSMPU
 	bool
 	select CPU_HAS_MPU
 	help
-	  This option is enabled when the CPU has a Memory Protection Unit (MPU)
-	  in NXP flavor.
+	  This option is enabled when the CPU has an NXP System Memory Protection
+	  Unit (SYSMPU).
 
 config CPU_HAS_CUSTOM_FIXED_SOC_MPU_REGIONS
 	bool "Custom fixed SoC MPU region definition"
diff --git a/arch/arm/core/cortex_m/fault.c b/arch/arm/core/cortex_m/fault.c
@@ -35,7 +35,7 @@ LOG_MODULE_DECLARE(os, CONFIG_KERNEL_LOG_LEVEL);
 #define PR_FAULT_INFO(...)
 #endif
 
-#if defined(CONFIG_ARM_MPU) && defined(CONFIG_CPU_HAS_NXP_MPU)
+#if defined(CONFIG_ARM_MPU) && defined(CONFIG_CPU_HAS_NXP_SYSMPU)
 #define EMN(edr)   (((edr) & SYSMPU_EDR_EMN_MASK) >> SYSMPU_EDR_EMN_SHIFT)
 #define EACD(edr)  (((edr) & SYSMPU_EDR_EACD_MASK) >> SYSMPU_EDR_EACD_SHIFT)
 #endif
@@ -392,7 +392,7 @@ static int bus_fault(struct arch_esf *esf, int from_hard_fault, bool *recoverabl
 	}
 #endif /* !defined(CONFIG_ARMV7_M_ARMV8_M_FP) */
 
-#if defined(CONFIG_ARM_MPU) && defined(CONFIG_CPU_HAS_NXP_MPU)
+#if defined(CONFIG_ARM_MPU) && defined(CONFIG_CPU_HAS_NXP_SYSMPU)
 	uint32_t sperr = SYSMPU->CESR & SYSMPU_CESR_SPERR_MASK;
 	uint32_t mask = BIT(31);
 	int i;
@@ -427,7 +427,7 @@ static int bus_fault(struct arch_esf *esf, int from_hard_fault, bool *recoverabl
 				/* Note: we can assume the fault originated
 				 * from the same security state for ARM
 				 * platforms implementing the NXP MPU
-				 * (CONFIG_CPU_HAS_NXP_MPU=y).
+				 * (CONFIG_CPU_HAS_NXP_SYSMPU=y).
 				 *
 				 * As we only assess thread stack corruption,
 				 * we only process the error further, if the
@@ -483,7 +483,7 @@ static int bus_fault(struct arch_esf *esf, int from_hard_fault, bool *recoverabl
 		}
 		SYSMPU->CESR &= ~sperr;
 	}
-#endif /* defined(CONFIG_ARM_MPU) && defined(CONFIG_CPU_HAS_NXP_MPU) */
+#endif /* defined(CONFIG_ARM_MPU) && defined(CONFIG_CPU_HAS_NXP_SYSMPU) */
 
 	/* clear BFSR sticky bits */
 	SCB->CFSR |= SCB_CFSR_BUSFAULTSR_Msk;
diff --git a/arch/arm/core/cortex_m/scb.c b/arch/arm/core/cortex_m/scb.c
@@ -23,7 +23,7 @@
 #include <zephyr/cache.h>
 #include <zephyr/arch/cache.h>
 
-#if defined(CONFIG_CPU_HAS_NXP_MPU)
+#if defined(CONFIG_CPU_HAS_NXP_SYSMPU)
 #include <fsl_sysmpu.h>
 #endif
 
@@ -62,7 +62,7 @@ void z_arm_clear_arm_mpu_config(void)
 		ARM_MPU_ClrRegion(i);
 	}
 }
-#elif CONFIG_CPU_HAS_NXP_MPU
+#elif CONFIG_CPU_HAS_NXP_SYSMPU
 void z_arm_clear_arm_mpu_config(void)
 {
 	int i;
@@ -76,7 +76,7 @@ void z_arm_clear_arm_mpu_config(void)
 		SYSMPU_RegionEnable(SYSMPU, i, false);
 	}
 }
-#endif /* CONFIG_CPU_HAS_NXP_MPU */
+#endif /* CONFIG_CPU_HAS_NXP_SYSMPU */
 #endif /* CONFIG_ARM_MPU */
 
 #if defined(CONFIG_INIT_ARCH_HW_AT_BOOT)
diff --git a/arch/arm/core/mpu/CMakeLists.txt b/arch/arm/core/mpu/CMakeLists.txt
@@ -4,11 +4,11 @@ zephyr_library()
 
 zephyr_library_sources(                             arm_core_mpu.c)
 zephyr_library_sources_ifdef(CONFIG_CPU_HAS_ARM_MPU arm_mpu.c)
-zephyr_library_sources_ifdef(CONFIG_CPU_HAS_NXP_MPU nxp_mpu.c)
+zephyr_library_sources_ifdef(CONFIG_CPU_HAS_NXP_SYSMPU nxp_mpu.c)
 
 if(CONFIG_CPU_CORTEX_M AND NOT CONFIG_CPU_HAS_CUSTOM_FIXED_SOC_MPU_REGIONS)
   zephyr_library_sources_ifdef(CONFIG_CPU_HAS_ARM_MPU arm_mpu_regions.c)
-  zephyr_library_sources_ifdef(CONFIG_CPU_HAS_NXP_MPU nxp_mpu_regions.c)
+  zephyr_library_sources_ifdef(CONFIG_CPU_HAS_NXP_SYSMPU nxp_mpu_regions.c)
 endif()
 
 if (CONFIG_CPU_AARCH32_CORTEX_R)
diff --git a/arch/arm/core/mpu/Kconfig b/arch/arm/core/mpu/Kconfig
@@ -11,7 +11,7 @@ config ARM_MPU
 	select SRAM_REGION_PERMISSIONS
 	select THREAD_STACK_INFO
 	select ARCH_HAS_EXECUTABLE_PAGE_BIT
-	select MPU_REQUIRES_POWER_OF_TWO_ALIGNMENT if !(CPU_HAS_NXP_MPU || ARMV8_M_BASELINE || ARMV8_M_MAINLINE || AARCH32_ARMV8_R)
+	select MPU_REQUIRES_POWER_OF_TWO_ALIGNMENT if !(CPU_HAS_NXP_SYSMPU || ARMV8_M_BASELINE || ARMV8_M_MAINLINE || AARCH32_ARMV8_R)
 	select MPU_REQUIRES_NON_OVERLAPPING_REGIONS if CPU_HAS_ARM_MPU && (ARMV8_M_BASELINE || ARMV8_M_MAINLINE || AARCH32_ARMV8_R)
 	select MPU_GAP_FILLING if AARCH32_ARMV8_R
 	select ARCH_MEM_DOMAIN_SUPPORTS_ISOLATED_STACKS
diff --git a/arch/arm/core/mpu/arm_core_mpu_dev.h b/arch/arm/core/mpu/arm_core_mpu_dev.h
@@ -76,7 +76,7 @@ struct k_thread;
  */
 #if (defined(CONFIG_MPU_REQUIRES_NON_OVERLAPPING_REGIONS) && \
 		defined(CONFIG_MPU_GAP_FILLING)) \
-	|| defined(CONFIG_CPU_HAS_NXP_MPU)
+	|| defined(CONFIG_CPU_HAS_NXP_SYSMPU)
 /*
  * When dynamic regions may not be defined on top of statically
  * allocated memory regions, defining a region for a supervisor
@@ -96,7 +96,7 @@ struct k_thread;
  * using a single MPU region.
  */
 #define ARM_CORE_MPU_NUM_MPU_REGIONS_FOR_MPU_STACK_GUARD 1
-#endif /* CONFIG_MPU_REQUIRES_NON_OVERLAPPING_REGIONS || CPU_HAS_NXP_MPU */
+#endif /* CONFIG_MPU_REQUIRES_NON_OVERLAPPING_REGIONS || CPU_HAS_NXP_SYSMPU */
 
 #endif /* CONFIG_USERSPACE */
 
diff --git a/include/zephyr/arch/arm/arch.h b/include/zephyr/arch/arm/arch.h
@@ -267,9 +267,9 @@ enum k_fatal_error_reason_arch {
 #ifdef CONFIG_CPU_HAS_ARM_MPU
 #include <zephyr/arch/arm/mpu/arm_mpu.h>
 #endif /* CONFIG_CPU_HAS_ARM_MPU */
-#ifdef CONFIG_CPU_HAS_NXP_MPU
+#ifdef CONFIG_CPU_HAS_NXP_SYSMPU
 #include <zephyr/arch/arm/mpu/nxp_mpu.h>
-#endif /* CONFIG_CPU_HAS_NXP_MPU */
+#endif /* CONFIG_CPU_HAS_NXP_SYSMPU */
 #endif /* CONFIG_ARM_MPU */
 #ifdef CONFIG_ARM_AARCH32_MMU
 #include <zephyr/arch/arm/mmu/arm_mmu.h>
diff --git a/soc/nxp/kinetis/k2x/CMakeLists.txt b/soc/nxp/kinetis/k2x/CMakeLists.txt
@@ -9,7 +9,7 @@ zephyr_sources(
   soc.c
   )
 
-if(DEFINED CONFIG_ARM_MPU AND DEFINED CONFIG_CPU_HAS_NXP_MPU)
+if(DEFINED CONFIG_ARM_MPU AND DEFINED CONFIG_CPU_HAS_NXP_SYSMPU)
   # MK22F12 series MCUs have NXP MPU
   zephyr_sources(nxp_mpu_regions.c)
 endif()
diff --git a/soc/nxp/kinetis/k2x/Kconfig b/soc/nxp/kinetis/k2x/Kconfig
@@ -45,4 +45,4 @@ config SOC_MK22F12
 	select CPU_HAS_FPU
 	select HAS_MCUX_DAC
 	select HAS_MCUX_RCM
-	select CPU_HAS_NXP_MPU
+	select CPU_HAS_NXP_SYSMPU
diff --git a/soc/nxp/kinetis/k6x/Kconfig b/soc/nxp/kinetis/k6x/Kconfig
@@ -7,7 +7,7 @@ config SOC_SERIES_KINETIS_K6X
 	select ARM
 	select CPU_CORTEX_M4
 	select CPU_CORTEX_M_HAS_DWT
-	select CPU_HAS_NXP_MPU
+	select CPU_HAS_NXP_SYSMPU
 	select HAS_MCUX_PIT
 	select CLOCK_CONTROL
 	select SOC_RESET_HOOK
diff --git a/soc/nxp/kinetis/k8x/Kconfig b/soc/nxp/kinetis/k8x/Kconfig
@@ -8,7 +8,7 @@ config SOC_SERIES_KINETIS_K8X
 	select ARM
 	select CPU_CORTEX_M4
 	select CPU_CORTEX_M_HAS_DWT
-	select CPU_HAS_NXP_MPU
+	select CPU_HAS_NXP_SYSMPU
 	select CPU_HAS_FPU
 	select CLOCK_CONTROL
 	select HAS_MCUX
diff --git a/soc/nxp/kinetis/ke1xf/Kconfig b/soc/nxp/kinetis/ke1xf/Kconfig
@@ -8,7 +8,7 @@ config SOC_SERIES_KINETIS_KE1XF
 	select ARM
 	select CPU_CORTEX_M4
 	select CPU_CORTEX_M_HAS_DWT
-	select CPU_HAS_NXP_MPU
+	select CPU_HAS_NXP_SYSMPU
 	select CPU_HAS_FPU
 	select CLOCK_CONTROL
 	select HAS_MCUX
diff --git a/soc/nxp/s32/s32k1/Kconfig b/soc/nxp/s32/s32k1/Kconfig
@@ -7,7 +7,7 @@ config SOC_SERIES_S32K1
 	select ARM
 	select HAS_NXP_S32_HAL
 	select HAS_MCUX
-	select CPU_HAS_NXP_MPU
+	select CPU_HAS_NXP_SYSMPU
 	select CPU_HAS_CUSTOM_FIXED_SOC_MPU_REGIONS
 	select MPU_ALLOW_FLASH_WRITE if !XIP
 	select CLOCK_CONTROL
diff --git a/tests/application_development/code_relocation/src/main.c b/tests/application_development/code_relocation/src/main.c
@@ -16,7 +16,7 @@
  *  have to configure the region appropriately in arm_mpu_regions.c.
  */
 
-#if (defined(CONFIG_ARM_MPU) && !defined(CONFIG_CPU_HAS_NXP_MPU))
+#if (defined(CONFIG_ARM_MPU) && !defined(CONFIG_CPU_HAS_NXP_SYSMPU))
 #include <cmsis_core.h>
 void disable_mpu_rasr_xn(void)
 {
@@ -71,7 +71,7 @@ void z_early_memset(void *dst, int c, size_t n)
 
 void *relocate_code_setup(void)
 {
-#if (defined(CONFIG_ARM_MPU) && !defined(CONFIG_CPU_HAS_NXP_MPU))
+#if (defined(CONFIG_ARM_MPU) && !defined(CONFIG_CPU_HAS_NXP_SYSMPU))
 	disable_mpu_rasr_xn();
 #endif	/* CONFIG_ARM_MPU */
 	return NULL;
diff --git a/tests/application_development/code_relocation/testcase.yaml b/tests/application_development/code_relocation/testcase.yaml
@@ -2,21 +2,22 @@ common:
   tags: linker
 tests:
   application_development.code_relocation:
-    filter: not CONFIG_CPU_HAS_NXP_MPU and CONFIG_MINIMAL_LIBC and dt_chosen_enabled("zephyr,itcm")
+    filter: not CONFIG_CPU_HAS_NXP_SYSMPU and CONFIG_MINIMAL_LIBC and
+            dt_chosen_enabled("zephyr,itcm")
     arch_allow: arm
     extra_configs:
       - CONFIG_RELOCATE_TO_ITCM=y
     platform_allow:
       - mimxrt1060_evk
   application_development.code_relocation_kinetis:
-    filter: CONFIG_CPU_HAS_NXP_MPU
+    filter: CONFIG_CPU_HAS_NXP_SYSMPU
     arch_allow: arm
     extra_configs:
       - CONFIG_MPU_ALLOW_FLASH_WRITE=y
     platform_allow:
       - frdm_k64f
   application_development.code_relocation.no_itcm:
-    filter: not CONFIG_CPU_HAS_NXP_MPU and not dt_chosen_enabled("zephyr,itcm")
+    filter: not CONFIG_CPU_HAS_NXP_SYSMPU and not dt_chosen_enabled("zephyr,itcm")
     arch_allow: arm
     extra_sections:
       - _SRAM2_RODATA_SECTION_NAME

Original file line number	Diff line number	Diff line change
`@@ -23,7 +23,7 @@`
`23`	`23`	`#include <zephyr/cache.h>`
`24`	`24`	`#include <zephyr/arch/cache.h>`
`25`	`25`
`26`		`-#if defined(CONFIG_CPU_HAS_NXP_MPU)`
	`26`	`+#if defined(CONFIG_CPU_HAS_NXP_SYSMPU)`
`27`	`27`	`#include <fsl_sysmpu.h>`
`28`	`28`	`#endif`
`29`	`29`
`@@ -62,7 +62,7 @@ void z_arm_clear_arm_mpu_config(void)`
`62`	`62`	`ARM_MPU_ClrRegion(i);`
`63`	`63`	`}`
`64`	`64`	`}`
`65`		`-#elif CONFIG_CPU_HAS_NXP_MPU`
	`65`	`+#elif CONFIG_CPU_HAS_NXP_SYSMPU`
`66`	`66`	`void z_arm_clear_arm_mpu_config(void)`
`67`	`67`	`{`
`68`	`68`	`int i;`
`@@ -76,7 +76,7 @@ void z_arm_clear_arm_mpu_config(void)`
`76`	`76`	`SYSMPU_RegionEnable(SYSMPU, i, false);`
`77`	`77`	`}`
`78`	`78`	`}`
`79`		`-#endif /* CONFIG_CPU_HAS_NXP_MPU */`
	`79`	`+#endif /* CONFIG_CPU_HAS_NXP_SYSMPU */`
`80`	`80`	`#endif /* CONFIG_ARM_MPU */`
`81`	`81`
`82`	`82`	`#if defined(CONFIG_INIT_ARCH_HW_AT_BOOT)`
Original file line number	Diff line number	Diff line change
`@@ -9,7 +9,7 @@ zephyr_sources(`
`9`	`9`	`soc.c`
`10`	`10`	`)`
`11`	`11`
`12`		`-if(DEFINED CONFIG_ARM_MPU AND DEFINED CONFIG_CPU_HAS_NXP_MPU)`
	`12`	`+if(DEFINED CONFIG_ARM_MPU AND DEFINED CONFIG_CPU_HAS_NXP_SYSMPU)`
`13`	`13`	`# MK22F12 series MCUs have NXP MPU`
`14`	`14`	`zephyr_sources(nxp_mpu_regions.c)`
`15`	`15`	`endif()`