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#include <zephyr/init.h>
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#include <zephyr/kernel.h>
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#include <zephyr/drivers/firmware/scmi/clk.h>
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+ #include <zephyr/drivers/firmware/scmi/nxp/cpu.h>
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#include <zephyr/drivers/firmware/scmi/power.h>
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#include <zephyr/dt-bindings/clock/imx95_clock.h>
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#include <zephyr/dt-bindings/power/imx95_power.h>
@@ -28,14 +29,18 @@ void soc_late_init_hook(void)
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static int soc_init (void )
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{
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+ int ret = 0 ;
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+ #if defined(CONFIG_NXP_SCMI_CPU_DOMAIN_HELPERS )
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+ struct scmi_cpu_sleep_mode_config cpu_cfg = {0 };
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+ #endif /* CONFIG_NXP_SCMI_CPU_DOMAIN_HELPERS */
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+
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#if defined(CONFIG_ETH_NXP_IMX_NETC ) && (DT_CHILD_NUM_STATUS_OKAY (DT_NODELABEL (netc )) != 0 )
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const struct device * clk_dev = DEVICE_DT_GET (DT_NODELABEL (scmi_clk ));
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struct scmi_protocol * proto = clk_dev -> data ;
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struct scmi_clock_rate_config clk_cfg = {0 };
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struct scmi_power_state_config pwr_cfg = {0 };
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uint32_t power_state = POWER_DOMAIN_STATE_OFF ;
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uint64_t enetref_clk = 250000000 ; /* 250 MHz*/
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- int ret ;
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/* Power up NETCMIX */
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pwr_cfg .domain_id = IMX95_PD_NETC ;
@@ -69,7 +74,18 @@ static int soc_init(void)
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return ret ;
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}
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#endif
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- return 0 ;
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+
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+ #if defined(CONFIG_NXP_SCMI_CPU_DOMAIN_HELPERS )
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+ cpu_cfg .cpu_id = CPU_IDX_M7P ;
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+ cpu_cfg .sleep_mode = CPU_SLEEP_MODE_RUN ;
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+
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+ ret = scmi_cpu_sleep_mode_set (& cpu_cfg );
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+ if (ret ) {
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+ return ret ;
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+ }
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+ #endif /* CONFIG_NXP_SCMI_CPU_DOMAIN_HELPERS */
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+
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+ return ret ;
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}
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/*
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