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board: arm64: Add suport for ROC-RK3588
Add initial support for the ROC-RK3588 AArch64 board. It features a quad-core Cortex-A55 CPU based on the ARMv8.2 architecture. This commit also enables SMP, allowing all four cores to run the synchronization sample. Signed-off-by: Guowei Li <[email protected]>
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# Copyright The Zephyr Project Contributors
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# SPDX-License-Identifier: Apache-2.0
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config BOARD_ROC_RK3588
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select SOC_RK3588

boards/firefly/roc_rk3588/board.yml

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board:
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name: roc_rk3588
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full_name: ROC-RK3588 (Quad-core Cortex-A55)
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vendor: firefly
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socs:
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- name: rk3588
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variants:
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- name: smp
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.. zephyr:board:: roc_rk3588
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Overview
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********
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The ROC-RK3588 is an Octa-Core 64-Bit Mini Computer powered by Rockchip RK3588, which supports up to 32GB RAM.
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It features M.2 PCIe3.0 interface for NVMe SSD expansion and provides rich interfaces including HDMI 2.1, DP1.4.
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Supporting WiFi 6 wireless transmission and Gigabit Ethernet, it enables high-speed network connectivity.
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RK3588 octa-core 64-bit processor (4×Cortex-A76+4×Cortex-A55), with 8nm lithography process,
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has frequency up to 2.4GHz. Integrated with ARM Mali-G610 MP4 quad-core GPU and built-in AI accelerator NPU,
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it provides 6Tops computing power. Zephyr OS is ported to run on it.
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- Board features:
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- RAM: Up to 32GB LPDDR4/LPDDR4x/LPDDR5
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- Storage:
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- Up to 128GB eMMC
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- M.2 PCIe3.0 NVMe SSD (2242/2260/2280)
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- TF-Card Slot
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- Wireless:
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- Supports WiFi 6 (802.11 a/b/g/n/ac/ax)
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- Supports BT 5.0
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- Display:
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- HDMI 2.1 (8K@60fps)
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- HDMI 2.0 (4K@60fps)
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- DP 1.4 (8K@30fps)
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- USB:
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- Two USB 3.0
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- One USB 2.0
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- One USB-C (USB3.0 OTG / DP1.4)
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- Network:
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- 1x 1000Mbps Ethernet (RJ45)
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- Debug:
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- UART debug ports for board
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- Other:
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- NPU with 6 TOPS computing power
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- ARM Mali-G610 MP4 quad-core GPU
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- Support OpenGL ES3.2/OpenCL 2.2/Vulkan1.1
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Supported Features
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==================
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.. zephyr:board-supported-hw::
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Devices
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========
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System Clock
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------------
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This board configuration uses a system clock frequency of 24 MHz.
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Cortex-A76 cores run up to 2.4 GHz and Cortex-A55 cores run up to 1.8 GHz.
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Serial Port
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-----------
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This board configuration uses a single serial communication channel with the
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CPU's UART2.
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Programming and Debugging
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*************************
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.. zephyr:board-supported-runners::
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Use U-Boot to load the zephyr.bin to the memory and kick it:
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.. code-block:: console
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tftp 0x50000000 zephyr.bin; dcache flush; icache flush; dcache off; icache off; go 0x50000000
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Use this configuration to run basic Zephyr applications and kernel tests,
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for example, with the :zephyr:code-sample:`synchronization` sample:
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.. zephyr-app-commands::
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:zephyr-app: samples/synchronization
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:host-os: unix
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:board: roc_rk3588
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:goals: run
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This will build an image with the synchronization sample app, boot it and
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display the following ram console output:
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.. code-block:: console
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*** Booting Zephyr OS build v4.1.0-2356-gfe6366b8045a ***
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thread_a: Hello World from cpu 0 on roc_rk3588!
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thread_b: Hello World from cpu 0 on roc_rk3588!
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thread_a: Hello World from cpu 0 on roc_rk3588!
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thread_b: Hello World from cpu 0 on roc_rk3588!
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``roc_rk3588//smp`` support, use this configuration to run Zephyr smp applications and subsys tests,
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for example, with the :zephyr:code-sample:`synchronization` sample:
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.. zephyr-app-commands::
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:zephyr-app: samples/synchronization
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:host-os: unix
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:board: roc_rk3588//smp
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:goals: run
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This will build an image with the shell_module sample app, boot it and
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display the following ram console output:
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.. code-block:: console
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*** Booting Zephyr OS build v4.1.0-2356-gfe6366b8045a ***
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I/TC: Secondary CPU 1 initializing
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I/TC: Secondary CPU 1 switching to normal world boot
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Secondary CPU core 1 (MPID:0x100) is up
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I/TC: Secondary CPU 2 initializing
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I/TC: Secondary CPU 2 switching to normal world boot
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Secondary CPU core 2 (MPID:0x200) is up
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I/TC: Secondary CPU 3 initializing
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I/TC: Secondary CPU 3 switching to normal world boot
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Secondary CPU core 3 (MPID:0x300) is up
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thread_a: Hello World from cpu 0 on roc_rk3588!
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thread_b: Hello World from cpu 1 on roc_rk3588!
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thread_a: Hello World from cpu 0 on roc_rk3588!
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thread_b: Hello World from cpu 1 on roc_rk3588!
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References
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==========
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More information can refer to Firefly official website:
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`Firefly website`_.
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.. _Firefly website:
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https://en.t-firefly.com/product/industry/rocrk3588pc.html?theme=pc
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/*
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* Copyright The Zephyr Project Contributors
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* SPDX-License-Identifier: Apache-2.0
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*/
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/dts-v1/;
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#include <arm64/rockchip/rk3588.dtsi>
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#include <common/mem.h>
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/ {
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model = "Firefly ROC-RK3588";
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compatible = "rockchip,rk3588";
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chosen {
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zephyr,console = &uart2;
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zephyr,shell-uart = &uart2;
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zephyr,sram = &dram;
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};
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dram: memory@50000000 {
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compatible = "mmio-sram";
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device_type = "memory";
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reg = <0x50000000 DT_SIZE_M(1)>;
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};
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};
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&uart2 {
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status = "okay";
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current-speed = <1500000>;
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};
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&uart3 {
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status = "disabled";
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current-speed = <115200>;
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};
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identifier: roc_rk3588
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name: Rockchip ROC RK3588
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type: mcu
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arch: arm64
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toolchain:
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- zephyr
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- cross-compile
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ram: 1024
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testing:
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ignore_tags:
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- net
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- bluetooth
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# Copyright The Zephyr Project Contributors
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# SPDX-License-Identifier: Apache-2.0
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# Platform Configuration
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CONFIG_ARM_ARCH_TIMER=y
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# Serial Drivers
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CONFIG_SERIAL=y
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CONFIG_UART_NS16550=y
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CONFIG_UART_INTERRUPT_DRIVEN=y
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# Enable console
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CONFIG_CONSOLE=y
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CONFIG_UART_CONSOLE=y
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# ARMv8 NS world with cache management
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CONFIG_ARMV8_A_NS=y
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CONFIG_CACHE_MANAGEMENT=y
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CONFIG_TICKLESS_KERNEL=y
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/*
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* Copyright The Zephyr Project Contributors
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include "roc_rk3588.dts"
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identifier: roc_rk3568_pc/rk3568/smp
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name: Rockchip ROC RK3568 PC SMP
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type: mcu
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arch: arm64
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toolchain:
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- zephyr
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- cross-compile
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ram: 1024
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supported:
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- smp
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testing:
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ignore_tags:
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- net
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- bluetooth
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# Copyright The Zephyr Project Contributors
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# SPDX-License-Identifier: Apache-2.0
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# Platform Configuration
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CONFIG_ARM_ARCH_TIMER=y
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# Serial Drivers
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CONFIG_SERIAL=y
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CONFIG_UART_NS16550=y
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CONFIG_UART_INTERRUPT_DRIVEN=y
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# Enable console
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CONFIG_CONSOLE=y
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CONFIG_UART_CONSOLE=y
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# ARMv8 NS world with cache management
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CONFIG_ARMV8_A_NS=y
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CONFIG_CACHE_MANAGEMENT=y
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CONFIG_DCACHE=y
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CONFIG_TICKLESS_KERNEL=y
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# SMP support
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CONFIG_SMP=y
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CONFIG_MP_MAX_NUM_CPUS=4
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CONFIG_MAX_THREAD_BYTES=4
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# PSCI support
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CONFIG_PM_CPU_OPS=y
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CONFIG_PM_CPU_OPS_PSCI=y

dts/arm64/rockchip/rk3588.dtsi

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clock-frequency = <24000000>;
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reg-shift = <2>;
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status = "disabled";
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};
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};
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};

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