include: bindings: high speed clock for the stm32F1/F4 series

FRASTM · nashif · commit 8d6d7baf9881 · 2024-12-05T19:59:47.000-05:00
The stm32F4 serie has HSI and HSE clock possible clock sources
The stm32F1 also has an external HSE possible clock source

Signed-off-by: Francois Ramu &lt;francois.ramu@st.com&gt;
diff --git a/include/zephyr/dt-bindings/clock/stm32f10x_clock.h b/include/zephyr/dt-bindings/clock/stm32f10x_clock.h
@@ -16,7 +16,6 @@
 /* Common clocks with stm32f1x defined in stm32f1_clock.h */
 #define STM32_SRC_PLL2CLK           (STM32_SRC_PLLCLK + 1)
 #define STM32_SRC_PLL3CLK           (STM32_SRC_PLL2CLK + 1)
-#define STM32_SRC_EXT_HSE           (STM32_SRC_PLL3CLK + 1)
 
 /** CFGR1 devices */
 #undef MCO1_SEL /* Need to redefine generic F1 MCO_SEL for connectivity line devices. */
diff --git a/include/zephyr/dt-bindings/clock/stm32f1_clock.h b/include/zephyr/dt-bindings/clock/stm32f1_clock.h
@@ -25,7 +25,8 @@
 /* Low speed clocks defined in stm32_common_clocks.h */
 #define STM32_SRC_HSI           (STM32_SRC_LSI + 1)
 #define STM32_SRC_HSE           (STM32_SRC_HSI + 1)
-#define STM32_SRC_PLLCLK        (STM32_SRC_HSE + 1)
+#define STM32_SRC_EXT_HSE       (STM32_SRC_HSE + 1)
+#define STM32_SRC_PLLCLK        (STM32_SRC_EXT_HSE + 1)
 
 #define STM32_CLOCK_REG_MASK    0xFFU
 #define STM32_CLOCK_REG_SHIFT   0U
