| 
 | 1 | +/*  | 
 | 2 | + * Copyright 2025 NXP  | 
 | 3 | + *  | 
 | 4 | + * SPDX-License-Identifier: Apache-2.0  | 
 | 5 | + */  | 
 | 6 | + | 
 | 7 | +#include <mem.h>  | 
 | 8 | +#include <zephyr/dt-bindings/memory-attr/memory-attr-arm.h>  | 
 | 9 | + | 
 | 10 | +/ {  | 
 | 11 | +	soc {  | 
 | 12 | +		itcm: memory@0 {  | 
 | 13 | +			compatible = "zephyr,memory-region", "mmio-sram";  | 
 | 14 | +			reg = <0x0 DT_SIZE_K(32)>;  | 
 | 15 | +			zephyr,memory-region = "ITCM";  | 
 | 16 | +		};  | 
 | 17 | + | 
 | 18 | +		itcm1: memory@11400000 {  | 
 | 19 | +			compatible = "zephyr,memory-region", "mmio-sram";  | 
 | 20 | +			reg = <0x11400000 DT_SIZE_K(32)>;  | 
 | 21 | +			zephyr,memory-region = "ITCM1";  | 
 | 22 | +		};  | 
 | 23 | + | 
 | 24 | +		dtcm: memory@20000000 {  | 
 | 25 | +			compatible = "zephyr,memory-region", "mmio-sram";  | 
 | 26 | +			reg = <0x20000000 DT_SIZE_K(64)>;  | 
 | 27 | +			zephyr,memory-region = "DTCM";  | 
 | 28 | +		};  | 
 | 29 | + | 
 | 30 | +		/* stdby_ram memory supports content retention in Standby mode */  | 
 | 31 | +		stdby_ram: memory@20400000 {  | 
 | 32 | +			compatible = "mmio-sram";  | 
 | 33 | +			reg = <0x20400000 DT_SIZE_K(32)>;  | 
 | 34 | +		};  | 
 | 35 | + | 
 | 36 | +		/* sram memory is available only in Run mode */  | 
 | 37 | +		sram: memory@20408000 {  | 
 | 38 | +			compatible = "mmio-sram";  | 
 | 39 | +			reg = <0x20408000 DT_SIZE_K(288)>;  | 
 | 40 | +		};  | 
 | 41 | + | 
 | 42 | +		dtcm1: memory@21400000 {  | 
 | 43 | +			compatible = "zephyr,memory-region", "mmio-sram";  | 
 | 44 | +			reg = <0x21400000 DT_SIZE_K(64)>;  | 
 | 45 | +			zephyr,memory-region = "DTCM1";  | 
 | 46 | +		};  | 
 | 47 | + | 
 | 48 | +		peripheral: peripheral@40000000 {  | 
 | 49 | +			ranges = <0x0 0x40000000 0x10000000>;  | 
 | 50 | +		};  | 
 | 51 | +	};  | 
 | 52 | +};  | 
 | 53 | + | 
 | 54 | +#include <nxp/nxp_mcxe31x_common.dtsi>  | 
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