dts: clock: stm32 configure ahb prescaler for HCLK

AHB prescaler is a value which divides the SYSCLOCK
to provide the HCLK. The HCLK supplies the core, AHB bus, memory.
On the stm32wb and stm32wl, the HCLK for CPU1 is HCLK1
with cpu1-prescaler.
By default the value is 1, else the HCLK must be correctly set.

Signed-off-by: Francois Ramu <[email protected]>

Author: FRASTM

dts/bindings/clock/st,stm32-rcc.yaml

@@ -58,12 +58,18 @@ properties:
       required: false
       enum:
         - 1
+        - 2
+        - 4
+        - 8
+        - 16
+        - 64
+        - 128
+        - 256
+        - 512
       description: |
           AHB prescaler. Sets a HCLK frequency (feeding Cortex-M Systick)
           lower than SYSCLK frequency (actual core frequency).
-          Zephyr doesn't make a difference today between these two clocks.
-          Changing this prescaler is not allowed until it is made possible to
-          use them independently in Zephyr clock subsystem.
+          The HCLK clocks CPU, AHB, memories and DMA.
 
     apb1-prescaler:
       type: int

dts/bindings/clock/st,stm32wb-rcc.yaml

@@ -18,13 +18,23 @@ properties:
       required: false
       enum:
         - 1
+        - 2
+        - 3
+        - 4
+        - 5
+        - 6
+        - 8
+        - 10
+        - 16
+        - 32
+        - 64
+        - 128
+        - 256
+        - 512
       description: |
           CPU1 prescaler. Sets a HCLK1 frequency (feeding Cortex-M Systick)
           lower than SYSCLK frequency (actual core frequency).
-          Zephyr doesn't make a difference today between these two clocks.
-          Changing this prescaler is not allowed until it is made possible to
-          use them independently in Zephyr clock subsystem.
-          HCLK1 clocks CPU1, AHB1, AHB2, AHB3 and SRAM1.
+          The HCLK1 clocks CPU1, AHB1, AHB2, AHB3 and SRAM1.
 
     cpu2-prescaler:
       type: int