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RISCV: PMP: Use correct pmpcfg index for multi-register configurations
The PMP initialization and thread context switching logic was
incorrectly assuming that the configuration for all global PMP entries
was located within the first PMP configuration register, pmpcfg0
(represented by pmp_cfg[0]).
Each pmpcfg register holds the configuration for four PMP entries. As
the number of PMP entries increases and exceeds four, the configuration
data spills over into higher-indexed pmpcfg registers (e.g., pmpcfg1).
It is essential to store and restore the proper pmpcfg register content
to maintain the state of the system protection boundaries.
This patch fixes the indexing by calculating the correct pmpcfg array
index using integer division (index / 4) in two places:
1) z_riscv_pmp_init: Correctly saves the final global PMP entry's
configuration from pmp_cfg[index / 4].
2) z_riscv_pmp_thread_init: Correctly restores the saved configuration
to the appropriate pmp_cfg register index (global_pmp_end_index / 4)
during thread setup.
The patch also updates the write_pmp_entries call in
z_riscv_pmp_stackguard_enable to use the correct, generalized function
signature.
Signed-off-by: Firas Sammoura <[email protected]>
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