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drivers: flash: stm32 flash driver common functions
Move the flash_stm32_write_protection and flash_stm32_option_bytes_lock functions to a common file for stm32 devices including stm32h7 Signed-off-by: Francois Ramu <[email protected]>
1 parent 4488ed1 commit 900408b

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4 files changed

+140
-157
lines changed

4 files changed

+140
-157
lines changed

‎drivers/flash/flash_stm32.c‎

Lines changed: 60 additions & 137 deletions
Original file line numberDiff line numberDiff line change
@@ -42,8 +42,6 @@ static const struct flash_parameters flash_stm32_parameters = {
4242
#endif
4343
};
4444

45-
static int flash_stm32_write_protection(const struct device *dev, bool enable);
46-
4745
bool __weak flash_stm32_valid_range(const struct device *dev, off_t offset,
4846
uint32_t len, bool write)
4947
{
@@ -59,6 +57,66 @@ int __weak flash_stm32_check_configuration(void)
5957
}
6058

6159

60+
int flash_stm32_write_protection(const struct device *dev, bool enable)
61+
{
62+
FLASH_TypeDef *regs = FLASH_STM32_REGS(dev);
63+
64+
int rc = 0;
65+
66+
if (enable) {
67+
rc = flash_stm32_wait_flash_idle(dev);
68+
if (rc) {
69+
flash_stm32_sem_give(dev);
70+
return rc;
71+
}
72+
}
73+
74+
#if defined(FLASH_SECURITY_NS)
75+
if (enable) {
76+
regs->NSCR |= FLASH_STM32_NSLOCK;
77+
} else {
78+
if (regs->NSCR & FLASH_STM32_NSLOCK) {
79+
regs->NSKEYR = FLASH_KEY1;
80+
regs->NSKEYR = FLASH_KEY2;
81+
}
82+
}
83+
#elif defined(FLASH_CR_LOCK)
84+
if (enable) {
85+
regs->CR |= FLASH_CR_LOCK;
86+
} else {
87+
if (regs->CR & FLASH_CR_LOCK) {
88+
regs->KEYR = FLASH_KEY1;
89+
regs->KEYR = FLASH_KEY2;
90+
}
91+
}
92+
#else
93+
if (enable) {
94+
regs->PECR |= FLASH_PECR_PRGLOCK;
95+
regs->PECR |= FLASH_PECR_PELOCK;
96+
} else {
97+
if (regs->PECR & FLASH_PECR_PRGLOCK) {
98+
LOG_DBG("Disabling write protection");
99+
regs->PEKEYR = FLASH_PEKEY1;
100+
regs->PEKEYR = FLASH_PEKEY2;
101+
regs->PRGKEYR = FLASH_PRGKEY1;
102+
regs->PRGKEYR = FLASH_PRGKEY2;
103+
}
104+
if (FLASH->PECR & FLASH_PECR_PRGLOCK) {
105+
LOG_ERR("Unlock failed");
106+
rc = -EIO;
107+
}
108+
}
109+
#endif /* FLASH_SECURITY_NS */
110+
111+
if (enable) {
112+
LOG_DBG("Enable write protection");
113+
} else {
114+
LOG_DBG("Disable write protection");
115+
}
116+
117+
return rc;
118+
}
119+
62120
#if !defined(CONFIG_SOC_SERIES_STM32WBX)
63121
static int flash_stm32_check_status(const struct device *dev)
64122
{
@@ -228,141 +286,6 @@ static int flash_stm32_write(const struct device *dev, off_t offset,
228286
return rc;
229287
}
230288

231-
static int flash_stm32_write_protection(const struct device *dev, bool enable)
232-
{
233-
FLASH_TypeDef *regs = FLASH_STM32_REGS(dev);
234-
235-
int rc = 0;
236-
237-
if (enable) {
238-
rc = flash_stm32_wait_flash_idle(dev);
239-
if (rc) {
240-
flash_stm32_sem_give(dev);
241-
return rc;
242-
}
243-
}
244-
245-
#if defined(FLASH_SECURITY_NS)
246-
if (enable) {
247-
regs->NSCR |= FLASH_STM32_NSLOCK;
248-
} else {
249-
if (regs->NSCR & FLASH_STM32_NSLOCK) {
250-
regs->NSKEYR = FLASH_KEY1;
251-
regs->NSKEYR = FLASH_KEY2;
252-
}
253-
}
254-
#elif defined(FLASH_CR_LOCK)
255-
if (enable) {
256-
regs->CR |= FLASH_CR_LOCK;
257-
} else {
258-
if (regs->CR & FLASH_CR_LOCK) {
259-
regs->KEYR = FLASH_KEY1;
260-
regs->KEYR = FLASH_KEY2;
261-
}
262-
}
263-
#else
264-
if (enable) {
265-
regs->PECR |= FLASH_PECR_PRGLOCK;
266-
regs->PECR |= FLASH_PECR_PELOCK;
267-
} else {
268-
if (regs->PECR & FLASH_PECR_PRGLOCK) {
269-
LOG_DBG("Disabling write protection");
270-
regs->PEKEYR = FLASH_PEKEY1;
271-
regs->PEKEYR = FLASH_PEKEY2;
272-
regs->PRGKEYR = FLASH_PRGKEY1;
273-
regs->PRGKEYR = FLASH_PRGKEY2;
274-
}
275-
if (FLASH->PECR & FLASH_PECR_PRGLOCK) {
276-
LOG_ERR("Unlock failed");
277-
rc = -EIO;
278-
}
279-
}
280-
#endif /* FLASH_SECURITY_NS */
281-
282-
if (enable) {
283-
LOG_DBG("Enable write protection");
284-
} else {
285-
LOG_DBG("Disable write protection");
286-
}
287-
288-
return rc;
289-
}
290-
291-
int flash_stm32_option_bytes_lock(const struct device *dev, bool enable)
292-
{
293-
FLASH_TypeDef *regs = FLASH_STM32_REGS(dev);
294-
295-
#if defined(FLASH_OPTCR_OPTLOCK) /* F2, F4, F7 */
296-
if (enable) {
297-
regs->OPTCR |= FLASH_OPTCR_OPTLOCK;
298-
} else if (regs->OPTCR & FLASH_OPTCR_OPTLOCK) {
299-
regs->OPTKEYR = FLASH_OPT_KEY1;
300-
regs->OPTKEYR = FLASH_OPT_KEY2;
301-
}
302-
#else
303-
int rc;
304-
305-
/* Unlock CR/PECR/NSCR register if needed. */
306-
if (!enable) {
307-
rc = flash_stm32_write_protection(dev, false);
308-
if (rc) {
309-
return rc;
310-
}
311-
}
312-
#if defined(FLASH_CR_OPTWRE) /* F0, F1 and F3 */
313-
if (enable) {
314-
regs->CR &= ~FLASH_CR_OPTWRE;
315-
} else if (!(regs->CR & FLASH_CR_OPTWRE)) {
316-
regs->OPTKEYR = FLASH_OPTKEY1;
317-
regs->OPTKEYR = FLASH_OPTKEY2;
318-
}
319-
#elif defined(FLASH_CR_OPTLOCK) /* G0, G4, L4, WB and WL */
320-
if (enable) {
321-
regs->CR |= FLASH_CR_OPTLOCK;
322-
} else if (regs->CR & FLASH_CR_OPTLOCK) {
323-
regs->OPTKEYR = FLASH_OPTKEY1;
324-
regs->OPTKEYR = FLASH_OPTKEY2;
325-
}
326-
#elif defined(FLASH_PECR_OPTLOCK) /* L0 and L1 */
327-
if (enable) {
328-
regs->PECR |= FLASH_PECR_OPTLOCK;
329-
} else if (regs->PECR & FLASH_PECR_OPTLOCK) {
330-
regs->OPTKEYR = FLASH_OPTKEY1;
331-
regs->OPTKEYR = FLASH_OPTKEY2;
332-
}
333-
#elif defined(FLASH_NSCR_OPTLOCK) /* L5 and U5 */
334-
if (enable) {
335-
regs->NSCR |= FLASH_NSCR_OPTLOCK;
336-
} else if (regs->NSCR & FLASH_NSCR_OPTLOCK) {
337-
regs->OPTKEYR = FLASH_OPTKEY1;
338-
regs->OPTKEYR = FLASH_OPTKEY2;
339-
}
340-
#elif defined(FLASH_NSCR1_OPTLOCK) /* WBA */
341-
if (enable) {
342-
regs->NSCR1 |= FLASH_NSCR1_OPTLOCK;
343-
} else if (regs->NSCR1 & FLASH_NSCR1_OPTLOCK) {
344-
regs->OPTKEYR = FLASH_OPTKEY1;
345-
regs->OPTKEYR = FLASH_OPTKEY2;
346-
}
347-
#endif
348-
/* Lock CR/PECR/NSCR register if needed. */
349-
if (enable) {
350-
rc = flash_stm32_write_protection(dev, true);
351-
if (rc) {
352-
return rc;
353-
}
354-
}
355-
#endif
356-
357-
if (enable) {
358-
LOG_DBG("Option bytes locked");
359-
} else {
360-
LOG_DBG("Option bytes unlocked");
361-
}
362-
363-
return 0;
364-
}
365-
366289
#if defined(CONFIG_FLASH_EX_OP_ENABLED) && defined(CONFIG_FLASH_STM32_BLOCK_REGISTERS)
367290
int flash_stm32_control_register_disable(const struct device *dev)
368291
{

‎drivers/flash/flash_stm32.h‎

Lines changed: 2 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -260,6 +260,8 @@ struct flash_stm32_priv {
260260
#error RDP1 byte has to be different than RDP0 and RDP2 byte
261261
#endif
262262

263+
int flash_stm32_write_protection(const struct device *dev, bool enable);
264+
263265
#ifdef CONFIG_FLASH_PAGE_LAYOUT
264266
static inline bool flash_stm32_range_exists(const struct device *dev,
265267
off_t offset,

‎drivers/flash/flash_stm32_ex_op.c‎

Lines changed: 78 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -20,6 +20,9 @@
2020

2121
LOG_MODULE_REGISTER(flash_stm32_ex_op, CONFIG_FLASH_LOG_LEVEL);
2222

23+
/* Function definition is in the flash_stm32 driver for flash w/o FLASH_OPTCR_OPTLOCK */
24+
extern int flash_stm32_write_protection(const struct device *dev, bool enable);
25+
2326
#if defined(CONFIG_FLASH_STM32_WRITE_PROTECT)
2427
int flash_stm32_ex_op_sector_wp(const struct device *dev, const uintptr_t in,
2528
void *out)
@@ -258,3 +261,78 @@ int flash_stm32_ex_op(const struct device *dev, uint16_t code,
258261

259262
return rv;
260263
}
264+
265+
int flash_stm32_option_bytes_lock(const struct device *dev, bool enable)
266+
{
267+
FLASH_TypeDef *regs = FLASH_STM32_REGS(dev);
268+
269+
#if defined(FLASH_OPTCR_OPTLOCK) /* F2, F4, F7 or H7 */
270+
if (enable) {
271+
regs->OPTCR |= FLASH_OPTCR_OPTLOCK;
272+
} else if (regs->OPTCR & FLASH_OPTCR_OPTLOCK) {
273+
regs->OPTKEYR = FLASH_OPT_KEY1;
274+
regs->OPTKEYR = FLASH_OPT_KEY2;
275+
}
276+
#else
277+
int rc;
278+
279+
/* Unlock CR/PECR/NSCR register if needed. */
280+
if (!enable) {
281+
rc = flash_stm32_write_protection(dev, false);
282+
if (rc) {
283+
return rc;
284+
}
285+
}
286+
#if defined(FLASH_CR_OPTWRE) /* F0, F1 and F3 */
287+
if (enable) {
288+
regs->CR &= ~FLASH_CR_OPTWRE;
289+
} else if (!(regs->CR & FLASH_CR_OPTWRE)) {
290+
regs->OPTKEYR = FLASH_OPTKEY1;
291+
regs->OPTKEYR = FLASH_OPTKEY2;
292+
}
293+
#elif defined(FLASH_CR_OPTLOCK) /* G0, G4, L4, WB and WL */
294+
if (enable) {
295+
regs->CR |= FLASH_CR_OPTLOCK;
296+
} else if (regs->CR & FLASH_CR_OPTLOCK) {
297+
regs->OPTKEYR = FLASH_OPTKEY1;
298+
regs->OPTKEYR = FLASH_OPTKEY2;
299+
}
300+
#elif defined(FLASH_PECR_OPTLOCK) /* L0 and L1 */
301+
if (enable) {
302+
regs->PECR |= FLASH_PECR_OPTLOCK;
303+
} else if (regs->PECR & FLASH_PECR_OPTLOCK) {
304+
regs->OPTKEYR = FLASH_OPTKEY1;
305+
regs->OPTKEYR = FLASH_OPTKEY2;
306+
}
307+
#elif defined(FLASH_NSCR_OPTLOCK) /* L5 and U5 */
308+
if (enable) {
309+
regs->NSCR |= FLASH_NSCR_OPTLOCK;
310+
} else if (regs->NSCR & FLASH_NSCR_OPTLOCK) {
311+
regs->OPTKEYR = FLASH_OPTKEY1;
312+
regs->OPTKEYR = FLASH_OPTKEY2;
313+
}
314+
#elif defined(FLASH_NSCR1_OPTLOCK) /* WBA */
315+
if (enable) {
316+
regs->NSCR1 |= FLASH_NSCR1_OPTLOCK;
317+
} else if (regs->NSCR1 & FLASH_NSCR1_OPTLOCK) {
318+
regs->OPTKEYR = FLASH_OPTKEY1;
319+
regs->OPTKEYR = FLASH_OPTKEY2;
320+
}
321+
#endif
322+
/* Lock CRPECR/NSCR register if needed. */
323+
if (enable) {
324+
rc = flash_stm32_write_protection(dev, true);
325+
if (rc) {
326+
return rc;
327+
}
328+
}
329+
#endif
330+
331+
if (enable) {
332+
LOG_DBG("Option bytes locked");
333+
} else {
334+
LOG_DBG("Option bytes unlocked");
335+
}
336+
337+
return 0;
338+
}

‎drivers/flash/flash_stm32h7x.c‎

Lines changed: 0 additions & 20 deletions
Original file line numberDiff line numberDiff line change
@@ -114,26 +114,6 @@ void flash_stm32_set_rdp_level(const struct device *dev, uint8_t level)
114114
}
115115
#endif /* CONFIG_FLASH_STM32_READOUT_PROTECTION */
116116

117-
int flash_stm32_option_bytes_lock(const struct device *dev, bool enable)
118-
{
119-
FLASH_TypeDef *regs = FLASH_STM32_REGS(dev);
120-
121-
if (enable) {
122-
regs->OPTCR |= FLASH_OPTCR_OPTLOCK;
123-
} else if (regs->OPTCR & FLASH_OPTCR_OPTLOCK) {
124-
regs->OPTKEYR = FLASH_OPT_KEY1;
125-
regs->OPTKEYR = FLASH_OPT_KEY2;
126-
}
127-
128-
if (enable) {
129-
LOG_DBG("Option bytes locked");
130-
} else {
131-
LOG_DBG("Option bytes unlocked");
132-
}
133-
134-
return 0;
135-
}
136-
137117
bool flash_stm32_valid_range(const struct device *dev, off_t offset, uint32_t len, bool write)
138118
{
139119
#if defined(DUAL_BANK)

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