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drivers: i2s: esp32: optimize stream structs and add sanity check
Optimizes i2s_esp32_stream_data and i2s_esp32_stream_conf structs and adds property sanity check according to soc series based on SOC_GDMA_SUPPORTED feature Signed-off-by: Marcio Ribeiro <[email protected]>
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‎drivers/i2s/i2s_esp32.c‎

Lines changed: 57 additions & 36 deletions
Original file line numberDiff line numberDiff line change
@@ -57,7 +57,9 @@ struct i2s_esp32_stream_data {
5757
size_t mem_block_len;
5858
bool stop_without_draining;
5959
struct k_msgq queue;
60+
#if !SOC_GDMA_SUPPORTED
6061
struct intr_handle_data_t *irq_handle;
62+
#endif
6163
bool dma_pending;
6264
uint8_t chunks_rem;
6365
uint8_t chunk_idx;
@@ -67,16 +69,15 @@ struct i2s_esp32_stream_conf {
6769
void (*queue_drop)(const struct i2s_esp32_stream *stream);
6870
int (*start_transfer)(const struct device *dev);
6971
void (*stop_transfer)(const struct device *dev);
72+
#if SOC_GDMA_SUPPORTED
7073
const struct device *dma_dev;
7174
uint32_t dma_channel;
72-
#if SOC_GDMA_SUPPORTED
73-
void *dma_desc;
7475
#else
7576
lldesc_t *dma_desc;
76-
#endif
7777
int irq_source;
7878
int irq_priority;
7979
int irq_flags;
80+
#endif
8081
};
8182

8283
struct i2s_esp32_stream {
@@ -1508,12 +1509,46 @@ static DEVICE_API(i2s, i2s_esp32_driver_api) = {
15081509
.write = i2s_esp32_write
15091510
};
15101511

1511-
#define I2S_ESP32_STREAM_DECLARE_DMA_DESC(index, dir) \
1512+
#if SOC_GDMA_SUPPORTED
1513+
1514+
#define I2S_ESP32_DT_INST_SANITY_CHECK(index) \
1515+
BUILD_ASSERT(DT_INST_NODE_HAS_PROP(index, dmas), "Missing property: dmas"); \
1516+
BUILD_ASSERT(DT_INST_NODE_HAS_PROP(index, dma_names), "Missing property: dma-names");
1517+
1518+
#define I2S_ESP32_STREAM_DECL_DESC(index, rx)
1519+
1520+
#define I2S_ESP32_STREAM_DECLARE_DATA(index, dir)
1521+
1522+
#define I2S_ESP32_STREAM_DECLARE_CONF(index, dir) \
1523+
.dma_dev = UTIL_AND(DT_INST_DMAS_HAS_NAME(index, dir), \
1524+
DEVICE_DT_GET(DT_INST_DMAS_CTLR_BY_NAME(index, dir))), \
1525+
.dma_channel = UTIL_AND(DT_INST_DMAS_HAS_NAME(index, dir), \
1526+
DT_INST_DMAS_CELL_BY_NAME(index, dir, channel))
1527+
1528+
#else
1529+
1530+
#define I2S_ESP32_DT_INST_SANITY_CHECK(index) \
1531+
BUILD_ASSERT(!DT_INST_NODE_HAS_PROP(index, dmas), "Unexpected property: dmas"); \
1532+
BUILD_ASSERT(!DT_INST_NODE_HAS_PROP(index, dma_names), "Unexpected property: dma-names"); \
1533+
BUILD_ASSERT(DT_INST_NODE_HAS_PROP(index, interrupt_names), \
1534+
"Missing property: interrupt-names")
1535+
1536+
#define I2S_ESP32_STREAM_DECL_DESC(index, dir) \
15121537
lldesc_t i2s_esp32_stream_##index##_##dir##_dma_desc[CONFIG_I2S_ESP32_DMA_DESC_NUM_MAX]
15131538

1514-
#define I2S_ESP32_STREAM_DECL_DMA_DESC(index, dir) \
1515-
COND_CODE_1(DT_INST_IRQ_HAS_NAME(index, dir), \
1516-
(I2S_ESP32_STREAM_DECLARE_DMA_DESC(index, dir)), ())
1539+
#define I2S_ESP32_STREAM_DECLARE_DATA(index, dir) .irq_handle = NULL
1540+
1541+
#define I2S_ESP32_STREAM_DECLARE_CONF(index, dir) \
1542+
.irq_source = COND_CODE_1(DT_INST_IRQ_HAS_NAME(index, dir), \
1543+
(DT_INST_IRQ_BY_NAME(index, dir, irq)), (-1)), \
1544+
.irq_priority = COND_CODE_1(DT_INST_IRQ_HAS_NAME(index, dir), \
1545+
(DT_INST_IRQ_BY_NAME(index, dir, priority)), (-1)), \
1546+
.irq_flags = COND_CODE_1(DT_INST_IRQ_HAS_NAME(index, dir), \
1547+
(DT_INST_IRQ_BY_NAME(index, dir, flags)), (-1)), \
1548+
.dma_desc = UTIL_AND(DT_INST_IRQ_HAS_NAME(index, dir), \
1549+
i2s_esp32_stream_##index##_##dir##_dma_desc)
1550+
1551+
#endif /* SOC_GDMA_SUPPORTED */
15171552

15181553
#define I2S_ESP32_STREAM_DECLARE(index, dir) \
15191554
struct i2s_esp32_stream_data i2s_esp32_stream_##index##_##dir##_data = { \
@@ -1524,48 +1559,34 @@ static DEVICE_API(i2s, i2s_esp32_driver_api) = {
15241559
.mem_block_len = 0, \
15251560
.stop_without_draining = false, \
15261561
.queue = {}, \
1527-
.irq_handle = NULL, \
1528-
.dma_pending = false \
1529-
}; \
1562+
.dma_pending = false, \
1563+
I2S_ESP32_STREAM_DECLARE_DATA(index, dir)}; \
15301564
\
15311565
const struct i2s_esp32_stream_conf i2s_esp32_stream_##index##_##dir##_conf = { \
15321566
.queue_drop = i2s_esp32_queue_drop, \
15331567
.start_transfer = i2s_esp32_##dir##_start_transfer, \
15341568
.stop_transfer = i2s_esp32_##dir##_stop_transfer, \
1535-
.dma_dev = UTIL_AND(DT_INST_DMAS_HAS_NAME(index, dir), \
1536-
DEVICE_DT_GET(DT_INST_DMAS_CTLR_BY_NAME(index, dir))), \
1537-
.dma_channel = UTIL_AND(DT_INST_DMAS_HAS_NAME(index, dir), \
1538-
DT_INST_DMAS_CELL_BY_NAME(index, dir, channel)), \
1539-
.dma_desc = UTIL_AND(DT_INST_IRQ_HAS_NAME(index, dir), \
1540-
i2s_esp32_stream_##index##_##dir##_dma_desc), \
1541-
.irq_source = COND_CODE_1(DT_INST_IRQ_HAS_NAME(index, dir), \
1542-
(DT_INST_IRQ_BY_NAME(index, dir, irq)), (-1)), \
1543-
.irq_priority = COND_CODE_1(DT_INST_IRQ_HAS_NAME(index, dir), \
1544-
(DT_INST_IRQ_BY_NAME(index, dir, priority)), (-1)), \
1545-
.irq_flags = COND_CODE_1(DT_INST_IRQ_HAS_NAME(index, dir), \
1546-
(DT_INST_IRQ_BY_NAME(index, dir, flags)), (-1)) \
1547-
}
1548-
1549-
#define I2S_ESP32_STREAM_DECL(index, dir) \
1569+
I2S_ESP32_STREAM_DECLARE_CONF(index, dir)};
1570+
1571+
#define I2S_ESP32_STREAM_COND_DECLARE(index, dir) \
1572+
COND_CODE_1(DT_INST_IRQ_HAS_NAME(index, dir), (I2S_ESP32_STREAM_DECL_DESC(index, dir)), \
1573+
()); \
15501574
COND_CODE_1(UTIL_OR(DT_INST_DMAS_HAS_NAME(index, dir), DT_INST_IRQ_HAS_NAME(index, dir)), \
15511575
(I2S_ESP32_STREAM_DECLARE(index, dir)), ())
15521576

15531577
#define I2S_ESP32_STREAM_INIT(index, dir) \
1554-
.dir = {.conf = UTIL_AND(UTIL_OR(DT_INST_DMAS_HAS_NAME(index, dir), \
1555-
DT_INST_IRQ_HAS_NAME(index, dir)), \
1556-
&i2s_esp32_stream_##index##_##dir##_conf), \
1557-
.data = UTIL_AND(UTIL_OR(DT_INST_DMAS_HAS_NAME(index, dir), \
1558-
DT_INST_IRQ_HAS_NAME(index, dir)), \
1559-
&i2s_esp32_stream_##index##_##dir##_data)}
1578+
COND_CODE_1(UTIL_OR(DT_INST_DMAS_HAS_NAME(index, dir), DT_INST_IRQ_HAS_NAME(index, dir)), \
1579+
(.dir = {.conf = &i2s_esp32_stream_##index##_##dir##_conf, \
1580+
.data = &i2s_esp32_stream_##index##_##dir##_data}), \
1581+
(.dir = {.conf = NULL, .data = NULL}))
15601582

15611583
#define I2S_ESP32_INIT(index) \
1562-
PINCTRL_DT_INST_DEFINE(index); \
1584+
I2S_ESP32_DT_INST_SANITY_CHECK(index); \
15631585
\
1564-
I2S_ESP32_STREAM_DECL_DMA_DESC(index, rx); \
1565-
I2S_ESP32_STREAM_DECL(index, rx); \
1586+
PINCTRL_DT_INST_DEFINE(index); \
15661587
\
1567-
I2S_ESP32_STREAM_DECL_DMA_DESC(index, tx); \
1568-
I2S_ESP32_STREAM_DECL(index, tx); \
1588+
I2S_ESP32_STREAM_COND_DECLARE(index, rx); \
1589+
I2S_ESP32_STREAM_COND_DECLARE(index, tx); \
15691590
\
15701591
static struct i2s_esp32_data i2s_esp32_data_##index = {.clk_info = {0}}; \
15711592
\

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