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Marek Matejnashif
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soc: espressif: esp32s2: improve memory layout
- Allow more statical allocations by reordering the sections in the mcuboot.ld and in default.ld. - Reorder the ROM sections to cover the cases described in the `common-rom-common-kernel-devices.ld`. Changing the order of .rodata and .text we prevents to create an overlapped segments issue. Signed-off-by: Marek Matej <[email protected]>
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3 files changed

+113
-107
lines changed

3 files changed

+113
-107
lines changed

soc/espressif/esp32s2/default.ld

Lines changed: 56 additions & 56 deletions
Original file line numberDiff line numberDiff line change
@@ -17,7 +17,7 @@
1717
* If no bootloader is used, we can extend it to gain more user ram.
1818
*/
1919
#ifdef CONFIG_ESP_SIMPLE_BOOT
20-
user_iram_end = (DRAM_BUFFERS_START + IRAM_DRAM_OFFSET);
20+
user_iram_end = (BOOTLOADER_USER_DRAM_END + IRAM_DRAM_OFFSET);
2121
#else
2222
user_iram_end = BOOTLOADER_IRAM_LOADER_SEG_START;
2323
#endif
@@ -31,7 +31,7 @@ user_iram_seg_len = user_idram_size;
3131
user_dram_seg_len = user_idram_size;
3232

3333
/* Aliases */
34-
#define ROTEXT_REGION irom0_0_seg
34+
#define FLASH_CODE_REGION irom0_0_seg
3535
#define RODATA_REGION drom0_0_seg
3636
#define IRAM_REGION iram0_0_seg
3737
#define RAMABLE_REGION dram0_0_seg
@@ -42,7 +42,6 @@ user_dram_seg_len = user_idram_size;
4242
#undef GROUP_ROM_LINK_IN
4343
#define GROUP_ROM_LINK_IN(vregion, lregion) > RODATA_REGION AT > lregion
4444

45-
/* TODO */
4645
#define RESERVE_RTC_MEM 0
4746

4847
MEMORY
@@ -798,10 +797,63 @@ SECTIONS
798797

799798
/* --- END OF DRAM --- */
800799

800+
/* --- START OF .flash.text --- */
801+
802+
_image_irom_start = LOADADDR(.flash.text);
803+
_image_irom_size = SIZEOF(.flash.text);
804+
_image_irom_vaddr = ADDR(.flash.text);
805+
806+
.flash.text_dummy (NOLOAD):
807+
{
808+
. = ALIGN(CACHE_ALIGN);
809+
} GROUP_LINK_IN(ROMABLE_REGION)
810+
811+
.flash.text : ALIGN(4)
812+
{
813+
_stext = .;
814+
_instruction_reserved_start = ABSOLUTE(.);
815+
_text_start = ABSOLUTE(.);
816+
__text_region_start = ABSOLUTE(.);
817+
818+
#if !defined(CONFIG_ESP32_WIFI_IRAM_OPT)
819+
*libnet80211.a:( .wifi0iram .wifi0iram.* .wifislpiram .wifislpiram.*)
820+
*libpp.a:( .wifi0iram .wifi0iram.* .wifislpiram .wifislpiram.* .wifiorslpiram .wifiorslpiram.*)
821+
822+
#endif
823+
824+
#if !defined(CONFIG_ESP32_WIFI_RX_IRAM_OPT)
825+
*libnet80211.a:( .wifirxiram .wifirxiram.* .wifislprxiram .wifislprxiram.*)
826+
*libpp.a:( .wifirxiram .wifirxiram.* .wifislprxiram .wifislprxiram.*)
827+
#endif
828+
829+
*(.stub .gnu.warning .gnu.linkonce.literal.* .gnu.linkonce.t.*.literal .gnu.linkonce.t.*)
830+
*(.irom0.text) /* catch stray ICACHE_RODATA_ATTR */
831+
*(.fini.literal)
832+
*(.fini)
833+
*(.gnu.version)
834+
*(.literal .text .literal.* .text.*)
835+
836+
/* CPU will try to prefetch up to 16 bytes of
837+
* of instructions. This means that any configuration (e.g. MMU, PMS) must allow
838+
* safe access to up to 16 bytes after the last real instruction, add
839+
* dummy bytes to ensure this
840+
*/
841+
. += 16;
842+
843+
_text_end = ABSOLUTE(.);
844+
_instruction_reserved_end = ABSOLUTE(.); /* This is a symbol marking the flash.text end, this can be used for mmu driver to maintain virtual address */
845+
__text_region_end = ABSOLUTE(.);
846+
_etext = .;
847+
848+
} GROUP_DATA_LINK_IN(FLASH_CODE_REGION, ROMABLE_REGION)
849+
850+
/* --- END OF .flash.text --- */
851+
801852
/* --- START OF .rodata --- */
802853

803854
_image_drom_start = LOADADDR(.flash.rodata);
804855
_image_drom_size = LOADADDR(.flash.rodata_end) + SIZEOF(.flash.rodata_end) - _image_drom_start;
856+
_image_drom_size2 = _rodata_end - _rodata_start;
805857
_image_drom_vaddr = ADDR(.flash.rodata);
806858

807859
/* Align next section to 64k to allow mapping */
@@ -843,7 +895,6 @@ SECTIONS
843895
*(.dynamic)
844896
*(.gnu.version_d)
845897
. = ALIGN(4);
846-
_rodata_end = ABSOLUTE(.);
847898
/* Literals are also RO data. */
848899
_lit4_start = ABSOLUTE(.);
849900
*(*.lit4)
@@ -871,6 +922,7 @@ SECTIONS
871922
.flash.rodata_end :
872923
{
873924
. = ALIGN(CACHE_ALIGN);
925+
_rodata_end = ABSOLUTE(.);
874926
_image_rodata_end = ABSOLUTE(.);
875927
_rodata_reserved_end = ABSOLUTE(.);
876928
__rodata_region_end = ABSOLUTE(.);
@@ -879,58 +931,6 @@ SECTIONS
879931

880932
/* --- END OF .rodata --- */
881933

882-
/* --- START OF .flash.text --- */
883-
884-
_image_irom_start = LOADADDR(.flash.text);
885-
_image_irom_size = LOADADDR(.flash.text) + SIZEOF(.flash.text) - _image_irom_start;
886-
_image_irom_vaddr = ADDR(.flash.text);
887-
888-
.flash.text_dummy (NOLOAD):
889-
{
890-
. = ALIGN(CACHE_ALIGN+CACHE_ALIGN);
891-
} GROUP_LINK_IN(ROMABLE_REGION)
892-
893-
.flash.text : ALIGN(4)
894-
{
895-
_stext = .;
896-
_instruction_reserved_start = ABSOLUTE(.);
897-
_text_start = ABSOLUTE(.);
898-
__text_region_start = ABSOLUTE(.);
899-
900-
#if !defined(CONFIG_ESP32_WIFI_IRAM_OPT)
901-
*libnet80211.a:( .wifi0iram .wifi0iram.* .wifislpiram .wifislpiram.*)
902-
*libpp.a:( .wifi0iram .wifi0iram.* .wifislpiram .wifislpiram.* .wifiorslpiram .wifiorslpiram.*)
903-
904-
#endif
905-
906-
#if !defined(CONFIG_ESP32_WIFI_RX_IRAM_OPT)
907-
*libnet80211.a:( .wifirxiram .wifirxiram.* .wifislprxiram .wifislprxiram.*)
908-
*libpp.a:( .wifirxiram .wifirxiram.* .wifislprxiram .wifislprxiram.*)
909-
#endif
910-
911-
*(.stub .gnu.warning .gnu.linkonce.literal.* .gnu.linkonce.t.*.literal .gnu.linkonce.t.*)
912-
*(.irom0.text) /* catch stray ICACHE_RODATA_ATTR */
913-
*(.fini.literal)
914-
*(.fini)
915-
*(.gnu.version)
916-
*(.literal .text .literal.* .text.*)
917-
918-
/* CPU will try to prefetch up to 16 bytes of
919-
* of instructions. This means that any configuration (e.g. MMU, PMS) must allow
920-
* safe access to up to 16 bytes after the last real instruction, add
921-
* dummy bytes to ensure this
922-
*/
923-
. += 16;
924-
925-
_text_end = ABSOLUTE(.);
926-
_instruction_reserved_end = ABSOLUTE(.); /* This is a symbol marking the flash.text end, this can be used for mmu driver to maintain virtual address */
927-
__text_region_end = ABSOLUTE(.);
928-
_etext = .;
929-
930-
} GROUP_DATA_LINK_IN(ROTEXT_REGION, ROMABLE_REGION)
931-
932-
/* --- END OF .flash.text --- */
933-
934934
#ifdef CONFIG_GEN_ISR_TABLES
935935
#include <zephyr/linker/intlist.ld>
936936
#endif

soc/espressif/esp32s2/mcuboot.ld

Lines changed: 43 additions & 39 deletions
Original file line numberDiff line numberDiff line change
@@ -61,20 +61,19 @@ SECTIONS
6161
*libzephyr.a:cache_hal.*(.literal .text .literal.* .text.*)
6262
*libzephyr.a:flash_map.*(.literal .text .literal.* .text.*)
6363
*libzephyr.a:esp_rom_spiflash.*(.literal .text .literal.* .text.*)
64-
6564
*libzephyr.a:heap.*(.literal .text .literal.* .text.*)
66-
6765
*libkernel.a:kheap.*(.literal .text .literal.* .text.*)
6866
*libkernel.a:mempool.*(.literal .text .literal.* .text.*)
6967
*libkernel.a:device.*(.literal .text .literal.* .text.*)
7068
*libkernel.a:timeout.*(.literal .text .literal.* .text.*)
71-
72-
*(.literal.bootloader_mmap .text.bootloader_mmap)
73-
*(.literal.bootloader_munmap .text.bootloader_munmap)
74-
7569
*libzephyr.a:esp_loader.*(.literal .text .literal.* .text.*)
7670
*libzephyr.a:mmu_hal.*(.literal .text .literal.* .text.*)
71+
*libzephyr.a:rtc_time.*(.literal .literal.* .text .text.*)
72+
*libzephyr.a:rtc_clk.*(.literal .literal.* .text .text.*)
73+
*libzephyr.a:rtc_clk_init.*(.literal .literal.* .text .text.*)
7774

75+
*(.literal.bootloader_mmap .text.bootloader_mmap)
76+
*(.literal.bootloader_munmap .text.bootloader_munmap)
7877
*(.literal.esp_intr_disable .literal.esp_intr_disable.* .text.esp_intr_disable .text.esp_intr_disable.*)
7978
*(.literal.default_intr_handler .text.default_intr_handler .iram1.*.default_intr_handler)
8079
*(.literal.esp_log_timestamp .text.esp_log_timestamp)
@@ -90,14 +89,7 @@ SECTIONS
9089
* safe access to up to 16 bytes after the last real instruction, add
9190
* dummy bytes to ensure this
9291
*/
93-
. += 16;
94-
95-
_text_end = ABSOLUTE(.);
96-
_etext = .;
97-
. = ALIGN(4);
98-
_loader_text_end = ABSOLUTE(.);
99-
_iram_text_end = ABSOLUTE(.);
100-
_iram_end = ABSOLUTE(.);
92+
. = ALIGN(4) + 16;
10193
} > iram_loader_seg
10294

10395
.iram0.vectors : ALIGN(4)
@@ -136,7 +128,6 @@ SECTIONS
136128
*(.entry.text)
137129
*(.init.literal)
138130
*(.init)
139-
. = ALIGN (4);
140131
_init_end = ABSOLUTE(.);
141132

142133
_iram_start = ABSOLUTE(.);
@@ -156,33 +147,14 @@ SECTIONS
156147
. = ALIGN(4);
157148
} > iram_seg
158149

159-
.dram0.data : ALIGN(16)
150+
.dram.rodata :
160151
{
161-
. = ALIGN(4);
162-
__data_start = ABSOLUTE(.);
163-
164-
#include <snippets-rodata.ld>
152+
__rodata_region_start = ABSOLUTE(.);
165153

166154
. = ALIGN(4);
167-
#include <snippets-rwdata.ld>
155+
#include <snippets-rodata.ld>
168156
. = ALIGN(4);
169157

170-
*(.data)
171-
*(.data.*)
172-
*(.gnu.linkonce.d.*)
173-
*(.data1)
174-
*(.sdata)
175-
*(.sdata.*)
176-
*(.gnu.linkonce.s.*)
177-
*(.sdata2)
178-
*(.sdata2.*)
179-
*(.gnu.linkonce.s2.*)
180-
*libzephyr.a:mmu_hal.*(.rodata .rodata.*)
181-
*libzephyr.a:rtc_clk.*(.rodata .rodata.*)
182-
183-
KEEP(*(.jcr))
184-
*(.dram1 .dram1.*)
185-
. = ALIGN(4);
186158
*(.rodata)
187159
*(.rodata.*)
188160

@@ -216,17 +188,49 @@ SECTIONS
216188
*(.gnu.linkonce.lit4.*)
217189
_lit4_end = ABSOLUTE(.);
218190
. = ALIGN(4);
191+
_thread_local_start = ABSOLUTE(.);
192+
*(.tdata)
193+
*(.tdata.*)
194+
*(.tbss)
195+
*(.tbss.*)
219196
*(.rodata_wlog)
220197
*(.rodata_wlog*)
221198
_thread_local_end = ABSOLUTE(.);
222199
. = ALIGN(4);
223200
} > dram_seg
224201

202+
#include <zephyr/linker/common-rom/common-rom-cpp.ld>
225203
#include <zephyr/linker/common-rom/common-rom-kernel-devices.ld>
226204
#include <zephyr/linker/common-rom/common-rom-debug.ld>
227205
#include <zephyr/linker/common-rom/common-rom-misc.ld>
228206
#include <snippets-sections.ld>
229207

208+
.dram0.data :
209+
{
210+
__data_start = ABSOLUTE(.);
211+
212+
. = ALIGN(4);
213+
#include <snippets-rwdata.ld>
214+
. = ALIGN(4);
215+
216+
*(.data)
217+
*(.data.*)
218+
*(.gnu.linkonce.d.*)
219+
*(.data1)
220+
*(.sdata)
221+
*(.sdata.*)
222+
*(.gnu.linkonce.s.*)
223+
*(.sdata2)
224+
*(.sdata2.*)
225+
*(.gnu.linkonce.s2.*)
226+
*libzephyr.a:mmu_hal.*(.rodata .rodata.*)
227+
*libzephyr.a:rtc_clk.*(.rodata .rodata.*)
228+
229+
KEEP(*(.jcr))
230+
*(.dram1 .dram1.*)
231+
. = ALIGN(4);
232+
} > dram_seg
233+
230234
#include <zephyr/linker/cplusplus-rom.ld>
231235
#include <snippets-data-sections.ld>
232236
#include <zephyr/linker/common-ram.ld>
@@ -239,14 +243,14 @@ SECTIONS
239243
. = ALIGN(8);
240244
*(.noinit)
241245
*(.noinit.*)
242-
. = ALIGN(8) ;
246+
. = ALIGN(8);
243247
} > dram_seg
244248

245249
/* Shared RAM */
246250
.bss (NOLOAD):
247251
{
248252
. = ALIGN (8);
249-
_bss_start = ABSOLUTE(.); /* required by bluetooth library */
253+
_bss_start = ABSOLUTE(.);
250254
__bss_start = ABSOLUTE(.);
251255

252256
*(.dynsbss)

soc/espressif/esp32s2/memory.h

Lines changed: 14 additions & 12 deletions
Original file line numberDiff line numberDiff line change
@@ -29,26 +29,28 @@
2929
*/
3030
#define IRAM_DRAM_OFFSET 0x70000
3131
#define DRAM_BUFFERS_START 0x3ffeab00
32+
#define DRAM_RESERVED_START 0x3ffec000
3233
#define DRAM_STACK_START 0x3fffc410
3334
#define DRAM_ROM_BSS_DATA_START 0x3fffe710
3435

36+
/* For safety margin between bootloader data section and startup stacks */
37+
#define BOOTLOADER_STACK_OVERHEAD 0x0
38+
#define BOOTLOADER_DRAM_SEG_LEN 0x7000
39+
#define BOOTLOADER_IRAM_LOADER_SEG_LEN 0x3000
40+
#define BOOTLOADER_IRAM_SEG_LEN 0xa000
41+
3542
/* Base address used for calculating memory layout
3643
* counted from Dbus backwards and back to the Ibus
3744
*/
38-
#define BOOTLOADER_USABLE_DRAM_END DRAM_BUFFERS_START
39-
40-
/* For safety margin between bootloader data section and startup stacks */
41-
#define BOOTLOADER_STACK_OVERHEAD 0x0
42-
#define BOOTLOADER_DRAM_SEG_LEN 0x6000
43-
#define BOOTLOADER_IRAM_LOADER_SEG_LEN 0x2800
44-
#define BOOTLOADER_IRAM_SEG_LEN 0x8000
45+
#define BOOTLOADER_USER_DRAM_END (DRAM_RESERVED_START - BOOTLOADER_STACK_OVERHEAD)
4546

4647
/* Start of the lower region is determined by region size and the end of the higher region */
47-
#define BOOTLOADER_DRAM_SEG_END (BOOTLOADER_USABLE_DRAM_END - BOOTLOADER_STACK_OVERHEAD)
48-
#define BOOTLOADER_DRAM_SEG_START (BOOTLOADER_DRAM_SEG_END - BOOTLOADER_DRAM_SEG_LEN)
49-
#define BOOTLOADER_IRAM_LOADER_SEG_START (BOOTLOADER_DRAM_SEG_START - \
50-
BOOTLOADER_IRAM_LOADER_SEG_LEN + IRAM_DRAM_OFFSET)
51-
#define BOOTLOADER_IRAM_SEG_START (BOOTLOADER_IRAM_LOADER_SEG_START - BOOTLOADER_IRAM_SEG_LEN)
48+
#define BOOTLOADER_IRAM_LOADER_SEG_START (BOOTLOADER_USER_DRAM_END + IRAM_DRAM_OFFSET \
49+
- BOOTLOADER_IRAM_LOADER_SEG_LEN)
50+
#define BOOTLOADER_DRAM_SEG_START (BOOTLOADER_IRAM_LOADER_SEG_START - BOOTLOADER_DRAM_SEG_LEN \
51+
- IRAM_DRAM_OFFSET)
52+
#define BOOTLOADER_IRAM_SEG_START (BOOTLOADER_DRAM_SEG_START - BOOTLOADER_IRAM_SEG_LEN \
53+
+ IRAM_DRAM_OFFSET)
5254

5355
/* Flash */
5456
#ifdef CONFIG_FLASH_SIZE

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