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soc: npcx: add support for npcx9mfp
Add new SoC npcx9mfp support for npcx9 series. Signed-off-by: Jun Lin <[email protected]>
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dts/arm/nuvoton/npcx9mfp.dtsi

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/*
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* Copyright (c) 2023 Nuvoton Technology Corporation.
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include <mem.h>
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#include "npcx/npcx9.dtsi"
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/ {
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flash0: flash@10058000 {
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reg = <0x10058000 DT_SIZE_K(416)>;
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};
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flash1: flash@64000000 {
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reg = <0x64000000 DT_SIZE_K(1024)>;
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};
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sram0: memory@200c0000 {
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compatible = "mmio-sram";
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reg = <0x200C0000 DT_SIZE_K(92)>;
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};
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/* RAM space used by Booter */
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bootloader_ram: memory@200d7000 {
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compatible = "mmio-sram";
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reg = <0x200D7000 DT_SIZE_K(4)>;
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};
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soc-id {
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device-id = <0x2b>;
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};
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};
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&qspi_fiu0 {
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int_flash: w25q80@0 {
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compatible ="nuvoton,npcx-fiu-nor";
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size = <DT_SIZE_M(1 * 8)>;
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reg = <0>;
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status = "okay";
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/* quad spi bus configuration of nor flash device */
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qspi-flags = <NPCX_QSPI_SW_CS1>;
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mapped-addr = <0x64000000>;
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pinctrl-0 = <&int_flash_sl>;
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pinctrl-names = "default";
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};
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};

soc/arm/nuvoton_npcx/Kconfig

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default "npcx9m3" if SOC_NPCX9M3F
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default "npcx9m6" if SOC_NPCX9M6F
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default "npcx9m7" if SOC_NPCX9M7F
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default "npcx9mfp" if SOC_NPCX9MFP
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default "npcx4m3" if SOC_NPCX4M3F
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default "npcx4m8" if SOC_NPCX4M8F
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soc/arm/nuvoton_npcx/common/ecst/ecst_args.py

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'npcx9m3': {'ram_address': 0x10080000, 'ram_size': 0x50000},
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'npcx9m6': {'ram_address': 0x10090000, 'ram_size': 0x40000},
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'npcx9m7': {'ram_address': 0x10070000, 'ram_size': 0x60000},
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'npcx9mfp': {'ram_address': 0x10058000, 'ram_size': 0x80000},
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'npcx4m3': {'ram_address': 0x10088000, 'ram_size': 0x50000},
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'npcx4m8': {'ram_address': 0x10060000, 'ram_size': 0x7c800},
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}
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# Nuvoton Cortex-M4 Embedded Controller
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# Copyright (c) 2023 Nuvoton Technology Corporation.
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# SPDX-License-Identifier: Apache-2.0
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if SOC_NPCX9MFP
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config SOC
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default "npcx9mfp"
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endif # SOC_NPCX9MFP

soc/arm/nuvoton_npcx/npcx9/Kconfig.soc

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config SOC_NPCX9M7F
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bool "NPCX9M7F"
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config SOC_NPCX9MFP
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bool "NPCX9MFP"
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endchoice

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