soc: arm: stm32g4 with USB-C PD cannot use CC1 and CC2 pins by default

With this patch, the UCPD1 _CC1 and _CC2 pins
are disabling the USB Type-C and Power Delivery Dead Battery.

Signed-off-by: Francois Ramu <[email protected]>

Author: FRASTM

soc/arm/st_stm32/stm32g4/soc.c

@@ -15,6 +15,11 @@
 #include <arch/cpu.h>
 #include <arch/arm/aarch32/cortex_m/cmsis.h>
 
+#if defined(PWR_CR3_UCPD_DBDIS)
+#include <stm32_ll_bus.h>
+#include <stm32_ll_pwr.h>
+#endif /* PWR_CR3_UCPD_DBDIS */
+
 /**
  * @brief Perform basic hardware initialization at boot.
  *
@@ -45,6 +50,11 @@ static int stm32g4_init(const struct device *arg)
 	/* allow reflashing board */
 	LL_DBGMCU_EnableDBGSleepMode();
 
+#if defined(PWR_CR3_UCPD_DBDIS)
+	/* Disable USB Type-C dead battery pull-down behavior */
+	LL_APB1_GRP1_EnableClock(LL_APB1_GRP1_PERIPH_PWR);
+	LL_PWR_DisableUCPDDeadBattery();
+#endif /* PWR_CR3_UCPD_DBDIS */
 	return 0;
 }