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boards: SiFive HiFive1 board
Added support for the HiFive1 board from SiFive Signed-off-by: Tomasz Michalak <[email protected]> Signed-off-by: Karol Gugala <[email protected]> Signed-off-by: Tomasz Jurtsch <[email protected]>
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‎boards/riscv32/hifive1/CMakeLists.txt

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zephyr_library()
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zephyr_library_sources(pinmux.c)
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zephyr_library_sources(clock.c)
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zephyr_library_include_directories(${PROJECT_SOURCE_DIR}/drivers)

‎boards/riscv32/hifive1/Kconfig.board

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config BOARD_HIFIVE1
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bool "HiFive1 target"
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depends on SOC_RISCV32_FE310

‎boards/riscv32/hifive1/Kconfig.defconfig

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if BOARD_HIFIVE1
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config BOARD
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default "hifive1"
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endif

‎boards/riscv32/hifive1/board.h

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/*
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* Copyright (c) 2017 Jean-Paul Etienne <[email protected]>
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* Copyright (c) 2017 Palmer Dabbelt <[email protected]>
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#ifndef __INC_BOARD_H
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#define __INC_BOARD_H
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#include <soc.h>
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/*
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* UART clock configurations
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*
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* Define them here so that it can be replaced by global variables
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* on other boards where the uart clock is determined dynamically
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* following the PLL configuration
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*/
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#define uart_fe310_port_0_clk_freq 16000000
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#define uart_fe310_port_1_clk_freq 16000000
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/* LEDS configuration */
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#define LED0_GPIO_PORT "gpio0"
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#define LED1_GPIO_PORT "gpio0"
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#define LED2_GPIO_PORT "gpio0"
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#define LED0_GPIO_PIN 19
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#define LED1_GPIO_PIN 21
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#define LED2_GPIO_PIN 22
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#endif /* __INC_BOARD_H */

‎boards/riscv32/hifive1/clock.c

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/*
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* Copyright (c) 2017 Jean-Paul Etienne <[email protected]>
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* Copyright (c) 2017 Palmer Dabbelt <[email protected]>
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include <init.h>
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#include <board.h>
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#include "prci.h"
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/* Selects the 16MHz oscilator on the HiFive1 board, which provides a clock
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* that's accurate enough to actually drive serial ports off of.
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*/
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static int hifive1_clock_init(struct device *dev)
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{
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ARG_UNUSED(dev);
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PRCI_REG(PRCI_PLLCFG) = PLL_REFSEL(1) | PLL_BYPASS(1);
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PRCI_REG(PRCI_PLLDIV) = (PLL_FINAL_DIV_BY_1(1) | PLL_FINAL_DIV(0));
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PRCI_REG(PRCI_PLLCFG) |= PLL_SEL(1);
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PRCI_REG(PRCI_HFROSCCFG) &= ~ROSC_EN(1);
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return 0;
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}
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SYS_INIT(hifive1_clock_init, PRE_KERNEL_1, CONFIG_PINMUX_INIT_PRIORITY);

‎boards/riscv32/hifive1/doc/hifive1.rst

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.. _hifive1:
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SiFive HiFive1
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##############
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Overview
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********
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The HiFive1 is an Arduino-compatible development board with
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an FE310 RISC-V SoC.
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More information can be found on
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`SiFive's wesite <https://www.sifive.com/products/hifive1>`_.
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Programming and debugging
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*************************
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Building
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========
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Applications for the ``HiFive1`` board configuration can be built as usual
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(see :ref:`build_an_application`).
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In order to build the application for ``HiFive1``, set the ``BOARD`` variable
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to ``hifive1``.
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.. code-block:: bash
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export BOARD="hifive1"
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Flashing
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========
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In order to upload the application to the device, you'll need OpenOCD and GDB
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with RISC-V support.
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Download and installation instructions can be found in the
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`SiFive's Freedom-E-SDK GitHub repository
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<https://github.com/sifive/freedom-e-sdk>`_.
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With the necessary tools installed, you can connect to the board using OpenOCD.
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To establish an OpenOCD connection, switch to the
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:file:`utils` directory and run:
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.. code-block:: bash
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# assuming that the location of the openocd is in PATH
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sudo openocd -f ${SDK_PATH}/bsp/env/freedom-e300-hifive1/openocd.cfg
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Leave it running, and in a different terminal, use GDB to upload the binary to
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the board. Use the RISC-V GDB from SiFive's Freedom-E-SDK toolchain.
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Before loading the binary image to the device, the device's flash protection
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must be disabled. Here are the GDB terminal commands to connect to the device,
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disable the flash protection, load the binary, and start it running:
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.. code-block:: console
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gdb
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(gdb) set remotetimeout 240
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(gdb) target extended-remote localhost:3333
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(gdb) monitor reset halt
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(gdb) monitor flash protect 0 64 last off
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(gdb) load {path to repository}/build/zephyr/zephyr.elf
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(gdb) monitor resume
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Debugging
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=========
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Refer to the detailed overview about :ref:`application_debugging`.
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‎boards/riscv32/hifive1/hifive1_defconfig

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CONFIG_RISCV32=y
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CONFIG_SOC_SERIES_RISCV32_FE310=y
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CONFIG_SOC_RISCV32_FE310=y
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CONFIG_BOARD_HIFIVE1=y
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CONFIG_CONSOLE=y
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CONFIG_PRINTK=y
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CONFIG_SERIAL=y
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CONFIG_UART_FE310=y
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CONFIG_UART_FE310_PORT_0=y
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CONFIG_UART_FE310_PORT_0_BAUD_RATE=115200
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CONFIG_UART_FE310_PORT_0_NAME="uart0"
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CONFIG_UART_CONSOLE=y
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CONFIG_UART_CONSOLE_ON_DEV_NAME="uart0"
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CONFIG_PLIC_FE310=y
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CONFIG_PINMUX=y
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CONFIG_PINMUX_FE310=y
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CONFIG_RISCV_MACHINE_TIMER=y
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CONFIG_GPIO=y
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CONFIG_GPIO_FE310=y
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CONFIG_BOOT_BANNER=y

‎boards/riscv32/hifive1/pinmux.c

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/*
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* Copyright (c) 2017 Jean-Paul Etienne <[email protected]>
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include <init.h>
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#include <pinmux.h>
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#include <board.h>
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static int hifive1_pinmux_init(struct device *dev)
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{
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ARG_UNUSED(dev);
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struct device *p = device_get_binding(CONFIG_PINMUX_FE310_0_NAME);
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/* UART0 RX */
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pinmux_pin_set(p, 16, FE310_PINMUX_IOF0);
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/* UART0 TX */
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pinmux_pin_set(p, 17, FE310_PINMUX_IOF0);
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/* SPI1 */
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pinmux_pin_set(p, 2, FE310_PINMUX_IOF0); /* SS0 */
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pinmux_pin_set(p, 3, FE310_PINMUX_IOF0); /* MOSI */
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pinmux_pin_set(p, 4, FE310_PINMUX_IOF0); /* MISO */
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pinmux_pin_set(p, 5, FE310_PINMUX_IOF0); /* SCK */
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pinmux_pin_set(p, 9, FE310_PINMUX_IOF0); /* SS2 */
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pinmux_pin_set(p, 10, FE310_PINMUX_IOF0); /* SS3 */
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return 0;
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}
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SYS_INIT(hifive1_pinmux_init, PRE_KERNEL_1, CONFIG_PINMUX_INIT_PRIORITY);

‎boards/riscv32/hifive1/prci.h

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/*
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* Copyright (c) 2017 SiFive Inc
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#ifndef _SIFIVE_PRCI_H
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#define _SIFIVE_PRCI_H
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#define _REG32(p, i) (*(volatile uint32_t *) ((p) + (i)))
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#define PRCI_REG(offset) _REG32(PRCI_BASE_ADDR, offset)
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/* Register offsets */
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#define PRCI_HFROSCCFG (0x0000)
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#define PRCI_HFXOSCCFG (0x0004)
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#define PRCI_PLLCFG (0x0008)
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#define PRCI_PLLDIV (0x000C)
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#define PRCI_PROCMONCFG (0x00F0)
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/* Fields */
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#define ROSC_DIV(x) (((x) & 0x2F) << 0)
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#define ROSC_TRIM(x) (((x) & 0x1F) << 16)
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#define ROSC_EN(x) (((x) & 0x1) << 30)
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#define ROSC_RDY(x) (((x) & 0x1) << 31)
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#define XOSC_EN(x) (((x) & 0x1) << 30)
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#define XOSC_RDY(x) (((x) & 0x1) << 31)
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#define PLL_R(x) (((x) & 0x7) << 0)
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/* single reserved bit for F LSB. */
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#define PLL_F(x) (((x) & 0x3F) << 4)
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#define PLL_Q(x) (((x) & 0x3) << 10)
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#define PLL_SEL(x) (((x) & 0x1) << 16)
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#define PLL_REFSEL(x) (((x) & 0x1) << 17)
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#define PLL_BYPASS(x) (((x) & 0x1) << 18)
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#define PLL_LOCK(x) (((x) & 0x1) << 31)
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#define PLL_R_default 0x1
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#define PLL_F_default 0x1F
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#define PLL_Q_default 0x3
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#define PLL_REFSEL_HFROSC 0x0
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#define PLL_REFSEL_HFXOSC 0x1
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#define PLL_SEL_HFROSC 0x0
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#define PLL_SEL_PLL 0x1
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#define PLL_FINAL_DIV(x) (((x) & 0x3F) << 0)
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#define PLL_FINAL_DIV_BY_1(x) (((x) & 0x1) << 8)
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#define PROCMON_DIV(x) (((x) & 0x1F) << 0)
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#define PROCMON_TRIM(x) (((x) & 0x1F) << 8)
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#define PROCMON_EN(x) (((x) & 0x1) << 16)
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#define PROCMON_SEL(x) (((x) & 0x3) << 24)
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#define PROCMON_NT_EN(x) (((x) & 0x1) << 28)
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#define PROCMON_SEL_HFCLK 0
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#define PROCMON_SEL_HFXOSCIN 1
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#define PROCMON_SEL_PLLOUTDIV 2
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#define PROCMON_SEL_PROCMON 3
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#endif /* _SIFIVE_PRCI_H */

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