dts: arm: stm32g4: add can bindings to stm32g4 SoCs

This commit adds the CAN nodes to the STM32g4 SoCs.

Signed-off-by: Alexander Wachter <[email protected]>

Author: alexanderwachter

dts/arm/st/g4/stm32g4.dtsi

@@ -345,6 +345,30 @@
 			label = "SPI_3";
 		};
 
+		can {
+			compatible = "bosch,m-can-base";
+			#address-cells = <1>;
+			#size-cells = <1>;
+			std-filter-elements = <28>;
+			ext-filter-elements = <8>;
+			rx-fifo0-elements = <3>;
+			rx-fifo1-elements = <3>;
+			rx-buffer-elements = <0>;
+			tx-buffer-elements = <3>;
+
+			can1: can@40006400 {
+				compatible = "st,stm32-fdcan";
+				#address-cells = <1>;
+				#size-cells = <0>;
+				reg = <0x40006400 0x400>, <0x4000A400 0x350>;
+				reg-names = "m_can", "message_ram";
+				interrupts = <21 0>, <22 0>;
+				interrupt-names = "LINE_0", "LINE_1";
+				status = "disabled";
+				label = "CAN_1";
+			};
+		};
+
 		timers1: timers@40012c00 {
 			compatible = "st,stm32-timers";
 			reg = <0x40012c00 0x400>;

dts/arm/st/g4/stm32g474.dtsi

@@ -8,6 +8,32 @@
 
 / {
 	soc {
+		can {
+			can2: can@40006800 {
+				compatible = "st,stm32-fdcan";
+				#address-cells = <1>;
+				#size-cells = <0>;
+				reg = <0x40006800 0x400>, <0x4000A800 0x350>;
+				reg-names = "m_can", "message_ram";
+				interrupts = <86 0>, <87 0>;
+				interrupt-names = "LINE_0", "LINE_1";
+				status = "disabled";
+				label = "CAN_2";
+			};
+
+			can3: can@40006C00 {
+				compatible = "st,stm32-fdcan";
+				#address-cells = <1>;
+				#size-cells = <0>;
+				reg = <0x40006C00 0x400>, <0x4000AC00 0x350>;
+				reg-names = "m_can", "message_ram";
+				interrupts = <88 0>, <89 0>;
+				interrupt-names = "LINE_0", "LINE_1";
+				status = "disabled";
+				label = "CAN_3";
+			};
+		};
+
 		dac2: dac@50000c00 {
 			compatible = "st,stm32-dac";
 			reg = <0x50000c00 0x400>;