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| 1 | +/* |
| 2 | + * Copyright (c) 2023-2024 STMicroelectronics |
| 3 | + * |
| 4 | + * SPDX-License-Identifier: Apache-2.0 |
| 5 | + */ |
| 6 | + |
| 7 | +#include <st/h7/stm32h750Xb.dtsi> |
| 8 | +#include <st/h7/stm32h750xbhx-pinctrl.dtsi> |
| 9 | +#include "arduino_r3_connector.dtsi" |
| 10 | +#include <zephyr/dt-bindings/input/input-event-codes.h> |
| 11 | + |
| 12 | +/ { |
| 13 | + chosen { |
| 14 | + zephyr,console = &usart3; |
| 15 | + zephyr,shell-uart = &usart3; |
| 16 | + zephyr,sram = &sram0; |
| 17 | + zephyr,display = <dc; |
| 18 | + }; |
| 19 | + |
| 20 | + sdram2: sdram@d0000000 { |
| 21 | + compatible = "zephyr,memory-region", "mmio-sram"; |
| 22 | + device_type = "memory"; |
| 23 | + reg = <0xd0000000 DT_SIZE_M(16)>; /* 128Mbit */ |
| 24 | + zephyr,memory-region = "SDRAM2"; |
| 25 | + zephyr,memory-attr = <DT_MEM_ARM(ATTR_MPU_RAM)>; |
| 26 | + }; |
| 27 | + |
| 28 | + leds { |
| 29 | + compatible = "gpio-leds"; |
| 30 | + |
| 31 | + red_led: led_1 { |
| 32 | + gpios = <&gpioi 13 GPIO_ACTIVE_LOW>; |
| 33 | + label = "USER1 LD6"; |
| 34 | + }; |
| 35 | + |
| 36 | + green_led: led_2 { |
| 37 | + gpios = <&gpioj 2 GPIO_ACTIVE_LOW>; |
| 38 | + label = "USER2 LD7"; |
| 39 | + }; |
| 40 | + }; |
| 41 | + |
| 42 | + gpio_keys { |
| 43 | + compatible = "gpio-keys"; |
| 44 | + |
| 45 | + user_button: button { |
| 46 | + label = "User"; |
| 47 | + gpios = <&gpioc 13 GPIO_ACTIVE_HIGH>; |
| 48 | + zephyr,code = <INPUT_KEY_0>; |
| 49 | + }; |
| 50 | + }; |
| 51 | + |
| 52 | + aliases { |
| 53 | + led0 = &green_led; |
| 54 | + led1 = &red_led; |
| 55 | + sw0 = &user_button; |
| 56 | + die-temp0 = &die_temp; |
| 57 | + }; |
| 58 | +}; |
| 59 | + |
| 60 | +&clk_hse { |
| 61 | + clock-frequency = <DT_FREQ_M(25)>; |
| 62 | + hse-bypass; |
| 63 | + status = "okay"; |
| 64 | +}; |
| 65 | + |
| 66 | +&clk_lse { |
| 67 | + status = "okay"; |
| 68 | +}; |
| 69 | + |
| 70 | +&flash0 { |
| 71 | + status = "okay"; |
| 72 | +}; |
| 73 | + |
| 74 | +<dc { |
| 75 | + pinctrl-0 = <<dc_r0_pi15 <dc_r1_pj0 <dc_r2_pj1 <dc_r3_ph9 |
| 76 | + <dc_r4_pj3 <dc_r5_pj4 <dc_r6_pj5 <dc_r7_pj6 |
| 77 | + <dc_g0_pj7 <dc_g1_pj8 <dc_g2_pj9 <dc_g3_pj10 |
| 78 | + <dc_g4_pj11 <dc_g5_pi0 <dc_g6_pi1 <dc_g7_pk2 |
| 79 | + <dc_b0_pj12 <dc_b1_pj13 <dc_b2_pj14 <dc_b3_pj15 |
| 80 | + <dc_b4_pk3 <dc_b5_pk4 <dc_b6_pk5 <dc_b7_pk6 |
| 81 | + <dc_de_pk7 <dc_clk_pi14 <dc_hsync_pi12 <dc_vsync_pi9>; |
| 82 | + pinctrl-names = "default"; |
| 83 | + |
| 84 | + disp-on-gpios = <&gpiod 7 GPIO_ACTIVE_HIGH>; |
| 85 | + |
| 86 | + ext-sdram = <&sdram2>; |
| 87 | + status = "okay"; |
| 88 | + |
| 89 | + clocks = <&rcc STM32_CLOCK(APB3, 3)>, |
| 90 | + <&rcc STM32_SRC_PLL3_R NO_SEL>; |
| 91 | + |
| 92 | + width = <480>; |
| 93 | + height = <272>; |
| 94 | + pixel-format = <PANEL_PIXEL_FORMAT_RGB_565>; |
| 95 | + |
| 96 | + display-timings { |
| 97 | + compatible = "zephyr,panel-timing"; |
| 98 | + de-active = <1>; |
| 99 | + pixelclk-active = <0>; |
| 100 | + hsync-active = <0>; |
| 101 | + vsync-active = <0>; |
| 102 | + hsync-len = <1>; |
| 103 | + vsync-len = <10>; |
| 104 | + hback-porch = <43>; |
| 105 | + vback-porch = <12>; |
| 106 | + hfront-porch = <8>; |
| 107 | + vfront-porch = <4>; |
| 108 | + }; |
| 109 | + |
| 110 | + def-back-color-red = <0xFF>; |
| 111 | + def-back-color-green = <0xFF>; |
| 112 | + def-back-color-blue = <0xFF>; |
| 113 | +}; |
| 114 | + |
| 115 | +&pll { |
| 116 | + div-m = <5>; |
| 117 | + mul-n = <192>; |
| 118 | + div-p = <2>; |
| 119 | + div-q = <4>; |
| 120 | + div-r = <4>; |
| 121 | + clocks = <&clk_hse>; |
| 122 | + status = "okay"; |
| 123 | +}; |
| 124 | + |
| 125 | +&pll3 { |
| 126 | + div-m = <5>; |
| 127 | + mul-n = <192>; |
| 128 | + div-p = <2>; |
| 129 | + div-q = <20>; |
| 130 | + div-r = <99>; |
| 131 | + clocks = <&clk_hse>; |
| 132 | + status = "okay"; |
| 133 | +}; |
| 134 | + |
| 135 | +&rcc { |
| 136 | + clocks = <&pll>; |
| 137 | + clock-frequency = <DT_FREQ_M(480)>; |
| 138 | + d1cpre = <1>; |
| 139 | + hpre = <2>; |
| 140 | + d1ppre = <2>; |
| 141 | + d2ppre1 = <2>; |
| 142 | + d2ppre2 = <2>; |
| 143 | + d3ppre = <2>; |
| 144 | +}; |
| 145 | + |
| 146 | +&usart3 { |
| 147 | + pinctrl-0 = <&usart3_tx_pb10 &usart3_rx_pb11>; |
| 148 | + pinctrl-names = "default"; |
| 149 | + current-speed = <115200>; |
| 150 | + status = "okay"; |
| 151 | +}; |
| 152 | + |
| 153 | +&quadspi { |
| 154 | + pinctrl-names = "default"; |
| 155 | + pinctrl-0 = <&quadspi_clk_pf10 &quadspi_bk1_ncs_pg6 |
| 156 | + &quadspi_bk1_io0_pd11 &quadspi_bk1_io1_pf9 |
| 157 | + &quadspi_bk1_io2_pf7 &quadspi_bk1_io3_pf6 |
| 158 | + &quadspi_bk2_io0_ph2 &quadspi_bk2_io1_ph3 |
| 159 | + &quadspi_bk2_io2_pg9 &quadspi_bk2_io3_pg14>; |
| 160 | + dual-flash; |
| 161 | + status = "okay"; |
| 162 | + |
| 163 | + /* Sector erase 64KB uniform granularity */ |
| 164 | + /* Subsector erase 4KB, 32KB granularity */ |
| 165 | + mt25ql512ab1: qspi-nor-flash-1@0 { |
| 166 | + compatible = "st,stm32-qspi-nor"; |
| 167 | + reg = <0>; |
| 168 | + size = <DT_SIZE_M(512)>; /* 512 Mbits */ |
| 169 | + write-block-size = <4>; |
| 170 | + erase-block-size = <DT_SIZE_K(64)>; |
| 171 | + qspi-max-frequency = <72000000>; |
| 172 | + cs-high-time = <4>; /* >= 50 ns */ |
| 173 | + spi-bus-width = <4>; |
| 174 | + reset-cmd; |
| 175 | + status = "okay"; |
| 176 | + }; |
| 177 | + |
| 178 | + mt25ql512ab2: qspi-nor-flash-2@0 { |
| 179 | + compatible = "st,stm32-qspi-nor"; |
| 180 | + reg = <0>; |
| 181 | + size = <DT_SIZE_M(512)>; /* 512 Mbits */ |
| 182 | + qspi-max-frequency = <72000000>; |
| 183 | + status = "okay"; |
| 184 | + }; |
| 185 | +}; |
| 186 | + |
| 187 | +&fmc { |
| 188 | + pinctrl-0 = <&fmc_nbl0_pe0 &fmc_nbl1_pe1 |
| 189 | + &fmc_sdclk_pg8 &fmc_sdnwe_ph5 &fmc_sdcke1_ph7 |
| 190 | + &fmc_sdne1_ph6 &fmc_sdnras_pf11 &fmc_sdncas_pg15 |
| 191 | + &fmc_a0_pf0 &fmc_a1_pf1 &fmc_a2_pf2 &fmc_a3_pf3 &fmc_a4_pf4 |
| 192 | + &fmc_a5_pf5 &fmc_a6_pf12 &fmc_a7_pf13 &fmc_a8_pf14 |
| 193 | + &fmc_a9_pf15 &fmc_a10_pg0 &fmc_a11_pg1 |
| 194 | + &fmc_a14_pg4 &fmc_a15_pg5 &fmc_d0_pd14 &fmc_d1_pd15 |
| 195 | + &fmc_d2_pd0 &fmc_d3_pd1 &fmc_d4_pe7 &fmc_d5_pe8 &fmc_d6_pe9 |
| 196 | + &fmc_d7_pe10 &fmc_d8_pe11 &fmc_d9_pe12 &fmc_d10_pe13 |
| 197 | + &fmc_d11_pe14 &fmc_d12_pe15 &fmc_d13_pd8 &fmc_d14_pd9 |
| 198 | + &fmc_d15_pd10>; |
| 199 | + pinctrl-names = "default"; |
| 200 | + status = "okay"; |
| 201 | + |
| 202 | + sdram { |
| 203 | + status = "okay"; |
| 204 | + power-up-delay = <100>; |
| 205 | + num-auto-refresh = <8>; |
| 206 | + mode-register = <0x230>; |
| 207 | + refresh-rate = <0x603>; |
| 208 | + |
| 209 | + bank@1 { |
| 210 | + reg = <1>; |
| 211 | + st,sdram-control = <STM32_FMC_SDRAM_NC_8 |
| 212 | + STM32_FMC_SDRAM_NR_12 |
| 213 | + STM32_FMC_SDRAM_MWID_16 |
| 214 | + STM32_FMC_SDRAM_NB_4 |
| 215 | + STM32_FMC_SDRAM_CAS_3 |
| 216 | + STM32_FMC_SDRAM_SDCLK_PERIOD_2 |
| 217 | + STM32_FMC_SDRAM_RBURST_ENABLE |
| 218 | + STM32_FMC_SDRAM_RPIPE_1>; |
| 219 | + st,sdram-timing = <2 7 4 7 2 2 2>; |
| 220 | + }; |
| 221 | + }; |
| 222 | +}; |
| 223 | + |
| 224 | +&rtc { |
| 225 | + clocks = <&rcc STM32_CLOCK(APB4, 16)>, |
| 226 | + <&rcc STM32_SRC_LSE RTC_SEL(1)>; |
| 227 | + status = "okay"; |
| 228 | +}; |
| 229 | + |
| 230 | +&die_temp { |
| 231 | + status = "okay"; |
| 232 | +}; |
| 233 | + |
| 234 | +&adc3 { |
| 235 | + st,adc-clock-source = "SYNC"; |
| 236 | + st,adc-prescaler = <4>; |
| 237 | + status = "okay"; |
| 238 | +}; |
| 239 | + |
| 240 | +/* Arduino Header pins: Tx:D1, Rx:D0 */ |
| 241 | +/* LPUART1 can also be used with this pins */ |
| 242 | +&usart1 { |
| 243 | + dma-names = "tx", "rx"; |
| 244 | + pinctrl-0 = <&usart1_tx_pb6 &usart1_rx_pb7>; |
| 245 | + pinctrl-names = "default"; |
| 246 | + current-speed = <115200>; |
| 247 | + status = "okay"; |
| 248 | +}; |
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