soc: nxp_imx: Disable IVT/DCD when building for mcuboot

The bootloader application itself should contain the IVT/DCD
in the header, but the chainable application doesn't.

The ROM_START_OFFSET defaults to 0x400 otherwise the linker
alignment isn't taken into account.

Signed-off-by: Pieter De Gendt <[email protected]>

Author: pdgendt

soc/arm/nxp_imx/rt/Kconfig.defconfig.series

@@ -9,6 +9,7 @@ config SOC_SERIES
 	default "rt"
 
 config ROM_START_OFFSET
+	default 0x400 if BOOTLOADER_MCUBOOT
 	default 0x2000 if BOOT_FLEXSPI_NOR || BOOT_SEMC_NOR
 
 config CAN_MCUX_FLEXCAN

soc/arm/nxp_imx/rt/Kconfig.soc

@@ -385,6 +385,7 @@ config IPG_DIV
 
 menuconfig NXP_IMX_RT_BOOT_HEADER
 	bool "Enable the boot header"
+	depends on !BOOTLOADER_MCUBOOT
 	help
 	  Enable data structures required by the boot ROM to boot the
 	  application from an external flash device.
@@ -448,11 +449,11 @@ config CODE_ITCM
 
 config CODE_FLEXSPI
 	bool "Link code into external FlexSPI-controlled memory"
-	select NXP_IMX_RT_BOOT_HEADER
+	select NXP_IMX_RT_BOOT_HEADER if !BOOTLOADER_MCUBOOT
 
 config CODE_FLEXSPI2
 	bool "Link code into internal FlexSPI-controlled memory"
-	select NXP_IMX_RT_BOOT_HEADER
+	select NXP_IMX_RT_BOOT_HEADER if !BOOTLOADER_MCUBOOT
 
 endchoice