@@ -21,7 +21,7 @@ static u8_t m16src_ref;
2121static u8_t m16src_grd ;
2222static u8_t k32src_initialized ;
2323
24- static int _m16src_start (struct device * dev , clock_control_subsys_t sub_system )
24+ static int m16src_start (struct device * dev , clock_control_subsys_t sub_system )
2525{
2626 bool blocking ;
2727 u32_t imask ;
@@ -103,7 +103,7 @@ static int _m16src_start(struct device *dev, clock_control_subsys_t sub_system)
103103 }
104104}
105105
106- static int _m16src_stop (struct device * dev , clock_control_subsys_t sub_system )
106+ static int m16src_stop (struct device * dev , clock_control_subsys_t sub_system )
107107{
108108 u32_t imask ;
109109
@@ -144,7 +144,7 @@ static int _m16src_stop(struct device *dev, clock_control_subsys_t sub_system)
144144 return 0 ;
145145}
146146
147- static int _k32src_start (struct device * dev , clock_control_subsys_t sub_system )
147+ static int k32src_start (struct device * dev , clock_control_subsys_t sub_system )
148148{
149149 u32_t lf_clk_src ;
150150 u32_t imask ;
@@ -248,7 +248,7 @@ static int _k32src_start(struct device *dev, clock_control_subsys_t sub_system)
248248 */
249249 nrf_clock_int_enable (NRF_CLOCK_INT_HF_STARTED_MASK );
250250
251- err = _m16src_start (dev , false);
251+ err = m16src_start (dev , false);
252252 if (!err ) {
253253 NVIC_SetPendingIRQ (DT_NORDIC_NRF_CLOCK_0_IRQ_0 );
254254 } else {
@@ -390,7 +390,7 @@ void nrf_power_clock_isr(void *arg)
390390 NRF_CLOCK -> EVENTS_DONE = 0 ;
391391
392392 /* Calibration done, stop 16M Xtal. */
393- err = _m16src_stop (dev , NULL );
393+ err = m16src_stop (dev , NULL );
394394 __ASSERT_NO_MSG (!err || err == - EBUSY );
395395
396396 /* Start timer for next calibration. */
@@ -408,7 +408,7 @@ void nrf_power_clock_isr(void *arg)
408408 */
409409 NRF_CLOCK -> INTENSET = CLOCK_INTENSET_HFCLKSTARTED_Msk ;
410410
411- err = _m16src_start (dev , false);
411+ err = m16src_start (dev , false);
412412 if (!err ) {
413413 NVIC_SetPendingIRQ (DT_NORDIC_NRF_CLOCK_0_IRQ_0 );
414414 } else {
@@ -435,7 +435,7 @@ void nrf_power_clock_isr(void *arg)
435435#endif
436436}
437437
438- static int _clock_control_init (struct device * dev )
438+ static int clock_control_init (struct device * dev )
439439{
440440 /* TODO: Initialization will be called twice, once for 32KHz and then
441441 * for 16 MHz clock. The vector is also shared for other power related
@@ -453,26 +453,26 @@ static int _clock_control_init(struct device *dev)
453453}
454454
455455static const struct clock_control_driver_api _m16src_clock_control_api = {
456- .on = _m16src_start ,
457- .off = _m16src_stop ,
456+ .on = m16src_start ,
457+ .off = m16src_stop ,
458458 .get_rate = NULL ,
459459};
460460
461461DEVICE_AND_API_INIT (clock_nrf5_m16src ,
462462 DT_NORDIC_NRF_CLOCK_0_LABEL "_16M" ,
463- _clock_control_init , NULL , NULL , PRE_KERNEL_1 ,
463+ clock_control_init , NULL , NULL , PRE_KERNEL_1 ,
464464 CONFIG_KERNEL_INIT_PRIORITY_DEVICE ,
465465 & _m16src_clock_control_api );
466466
467467static const struct clock_control_driver_api _k32src_clock_control_api = {
468- .on = _k32src_start ,
468+ .on = k32src_start ,
469469 .off = NULL ,
470470 .get_rate = NULL ,
471471};
472472
473473DEVICE_AND_API_INIT (clock_nrf5_k32src ,
474474 DT_NORDIC_NRF_CLOCK_0_LABEL "_32K" ,
475- _clock_control_init , NULL , NULL , PRE_KERNEL_1 ,
475+ clock_control_init , NULL , NULL , PRE_KERNEL_1 ,
476476 CONFIG_KERNEL_INIT_PRIORITY_DEVICE ,
477477 & _k32src_clock_control_api );
478478
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