arch: arm: Separate common cpu_idle codes

SgrrZhf · fabiobaltieri · commit 9ba3d31310f2 · 2023-09-13T10:08:05.000+01:00
This commit separates cpu_idle.S into two asm files,
'cortex_a_r/cpu_idle.S' and 'cortex_m/cpu_idle.S'.

Signed-off-by: Huifeng Zhang &lt;Huifeng.Zhang@arm.com&gt;
diff --git a/arch/arm/core/CMakeLists.txt b/arch/arm/core/CMakeLists.txt
@@ -3,7 +3,6 @@
 zephyr_library()
 
 zephyr_library_sources(
-  cpu_idle.S
   fatal.c
   nmi.c
   nmi_on_reset.S
diff --git a/arch/arm/core/cortex_a_r/CMakeLists.txt b/arch/arm/core/cortex_a_r/CMakeLists.txt
@@ -17,6 +17,7 @@ zephyr_library_sources(
   irq_manage.c
   prep_c.c
   thread.c
+  cpu_idle.S
   )
 
 zephyr_library_sources_ifdef(CONFIG_GEN_SW_ISR_TABLE isr_wrapper.S)
diff --git a/arch/arm/core/cortex_a_r/cpu_idle.S b/arch/arm/core/cortex_a_r/cpu_idle.S
@@ -0,0 +1,117 @@
+/*
+ * Copyright (c) 2013-2014 Wind River Systems, Inc.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+/**
+ * @file
+ * @brief ARM Cortex-A and Cortex-R power management
+ *
+ */
+
+#include <zephyr/toolchain.h>
+#include <zephyr/linker/sections.h>
+
+#if defined(CONFIG_ARM_ON_EXIT_CPU_IDLE)
+#include <soc_cpu_idle.h>
+#endif
+
+_ASM_FILE_PROLOGUE
+
+GTEXT(z_arm_cpu_idle_init)
+GTEXT(arch_cpu_idle)
+GTEXT(arch_cpu_atomic_idle)
+
+.macro _sleep_if_allowed wait_instruction
+#if defined(CONFIG_ARM_ON_ENTER_CPU_IDLE_HOOK)
+	push	{r0, lr}
+	bl	z_arm_on_enter_cpu_idle
+	/* Skip the wait instruction if on_enter_cpu_idle() returns false. */
+	cmp	r0, #0
+	beq	_skip_\@
+#endif /* CONFIG_ARM_ON_ENTER_CPU_IDLE_HOOK */
+
+	/*
+	 * Wait for all memory transactions to complete before entering low
+	 * power state.
+	 */
+	dsb
+	\wait_instruction
+
+#if defined(CONFIG_ARM_ON_EXIT_CPU_IDLE)
+	/* Inline the macro provided by SoC-specific code */
+	SOC_ON_EXIT_CPU_IDLE
+#endif /* CONFIG_ARM_ON_EXIT_CPU_IDLE */
+
+#if defined(CONFIG_ARM_ON_ENTER_CPU_IDLE_HOOK)
+_skip_\@:
+	pop	{r0, lr}
+#endif /* CONFIG_ARM_ON_ENTER_CPU_IDLE_HOOK */
+.endm
+
+/**
+ *
+ * @brief Initialization of CPU idle
+ *
+ * Only called by arch_kernel_init(). Sets SEVONPEND bit once for the system's
+ * duration.
+ *
+ * C function prototype:
+ *
+ * void z_arm_cpu_idle_init(void);
+ */
+
+SECTION_FUNC(TEXT, z_arm_cpu_idle_init)
+	bx	lr
+
+SECTION_FUNC(TEXT, arch_cpu_idle)
+#ifdef CONFIG_TRACING
+	push	{r0, lr}
+	bl	sys_trace_idle
+	pop	{r0, lr}
+#endif /* CONFIG_TRACING */
+
+	/* Enter low power state */
+	_sleep_if_allowed wfi
+
+	/*
+	 * Clear PRIMASK and flush instruction buffer to immediately service
+	 * the wake-up interrupt.
+	 */
+	cpsie	i
+	isb
+
+	bx	lr
+
+SECTION_FUNC(TEXT, arch_cpu_atomic_idle)
+#ifdef CONFIG_TRACING
+	push	{r0, lr}
+	bl	sys_trace_idle
+	pop	{r0, lr}
+#endif /* CONFIG_TRACING */
+
+	/*
+	 * Lock PRIMASK while sleeping: wfe will still get interrupted by
+	 * incoming interrupts but the CPU will not service them right away.
+	 */
+	cpsid	i
+
+	/*
+	 * No need to set SEVONPEND, it's set once in z_arm_cpu_idle_init()
+	 * and never touched again.
+	 */
+
+	/* r0: interrupt mask from caller */
+
+	/* No BASEPRI, call wfe directly
+	 * (SEVONPEND is set in z_arm_cpu_idle_init())
+	 */
+	_sleep_if_allowed wfe
+
+	cmp	r0, #0
+	bne	_irq_disabled
+	cpsie	i
+_irq_disabled:
+
+	bx	lr
diff --git a/arch/arm/core/cortex_m/CMakeLists.txt b/arch/arm/core/cortex_m/CMakeLists.txt
@@ -17,6 +17,7 @@ zephyr_library_sources(
   irq_manage.c
   prep_c.c
   thread.c
+  cpu_idle.S
   )
 
 zephyr_library_sources_ifdef(CONFIG_GEN_SW_ISR_TABLE isr_wrapper.S)
diff --git a/arch/arm/core/cortex_m/cpu_idle.S b/arch/arm/core/cortex_m/cpu_idle.S
@@ -6,7 +6,7 @@
 
 /**
  * @file
- * @brief ARM Cortex-A, Cortex-M and Cortex-R power management
+ * @brief ARM Cortex-M power management
  *
  */
 
@@ -23,34 +23,12 @@ GTEXT(z_arm_cpu_idle_init)
 GTEXT(arch_cpu_idle)
 GTEXT(arch_cpu_atomic_idle)
 
-#if defined(CONFIG_CPU_CORTEX_M)
 #define _SCB_SCR		0xE000ED10
 
 #define _SCB_SCR_SEVONPEND	(1 << 4)
 #define _SCB_SCR_SLEEPDEEP	(1 << 2)
 #define _SCB_SCR_SLEEPONEXIT	(1 << 1)
 #define _SCR_INIT_BITS		_SCB_SCR_SEVONPEND
-#endif
-
-/**
- *
- * @brief Initialization of CPU idle
- *
- * Only called by arch_kernel_init(). Sets SEVONPEND bit once for the system's
- * duration.
- *
- * C function prototype:
- *
- * void z_arm_cpu_idle_init(void);
- */
-
-SECTION_FUNC(TEXT, z_arm_cpu_idle_init)
-#if defined(CONFIG_CPU_CORTEX_M)
-	ldr	r1, =_SCB_SCR
-	movs.n	r2, #_SCR_INIT_BITS
-	str	r2, [r1]
-#endif
-	bx	lr
 
 .macro _sleep_if_allowed wait_instruction
 #if defined(CONFIG_ARM_ON_ENTER_CPU_IDLE_HOOK)
@@ -84,6 +62,24 @@ _skip_\@:
 #endif /* CONFIG_ARM_ON_ENTER_CPU_IDLE_HOOK */
 .endm
 
+/**
+ *
+ * @brief Initialization of CPU idle
+ *
+ * Only called by arch_kernel_init(). Sets SEVONPEND bit once for the system's
+ * duration.
+ *
+ * C function prototype:
+ *
+ * void z_arm_cpu_idle_init(void);
+ */
+
+SECTION_FUNC(TEXT, z_arm_cpu_idle_init)
+	ldr	r1, =_SCB_SCR
+	movs.n	r2, #_SCR_INIT_BITS
+	str	r2, [r1]
+	bx	lr
+
 SECTION_FUNC(TEXT, arch_cpu_idle)
 #ifdef CONFIG_TRACING
 	push	{r0, lr}
@@ -162,10 +158,7 @@ SECTION_FUNC(TEXT, arch_cpu_atomic_idle)
 
 	/* r0: interrupt mask from caller */
 
-#if defined(CONFIG_ARMV6_M_ARMV8_M_BASELINE) \
-	|| defined(CONFIG_ARMV7_R) \
-	|| defined(CONFIG_AARCH32_ARMV8_R) \
-	|| defined(CONFIG_ARMV7_A)
+#if defined(CONFIG_ARMV6_M_ARMV8_M_BASELINE)
 	/* No BASEPRI, call wfe directly
 	 * (SEVONPEND is set in z_arm_cpu_idle_init())
 	 */

Original file line number	Diff line number	Diff line change
`@@ -17,6 +17,7 @@ zephyr_library_sources(`
`17`	`17`	`irq_manage.c`
`18`	`18`	`prep_c.c`
`19`	`19`	`thread.c`
	`20`	`+ cpu_idle.S`
`20`	`21`	`)`
`21`	`22`
`22`	`23`	`zephyr_library_sources_ifdef(CONFIG_GEN_SW_ISR_TABLE isr_wrapper.S)`