@@ -158,32 +158,35 @@ static int __set_one_port(struct device *dev, qm_pwm_t id, uint32_t pwm,
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}
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/*
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- * Set the duration for on/off timer of PWM.
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+ * Set the time to assert and de-assert the PWM pin .
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*
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- * This sets the duration for the pin to low or high.
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+ * This sets the duration for the pin to stay low or high.
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*
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- * Assumes a nominal system clock of 32MHz, each count of on/off represents
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- * 31.25ns (e.g. on == 2 means the pin stays high for 62.5ns).
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- * The duration of 1 count depends on system clock. Refer to the hardware
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- * manual for more information.
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+ * For example, with a nominal system clock of 32MHz, each count of on/off
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+ * represents 31.25ns (e.g. off == 2 means the pin is to be de-asserted at
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+ * 62.5ns from the beginning of a PWM cycle). The duration of 1 count depends
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+ * on system clock. Refer to the hardware manual for more information.
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*
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* Parameters
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- * dev: Device struct
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+ * dev: Pointer to PWM device structure
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* access_op: whether to set one pin or all
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- * pwm: Which PWM port to set
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- * on: Duration for pin to stay high (must be >= 2)
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- * off: Duration for pin to stay low (must be >= 2)
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+ * pwm: PWM port number to set
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+ * on: How far (in timer count) from the beginning of a PWM cycle the PWM
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+ * pin should be asserted. Must be zero, since PWM from Quark MCU always
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+ * starts from high.
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+ * off: How far (in timer count) from the beginning of a PWM cycle the PWM
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+ * pin should be de-asserted.
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*
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- * return 0, -ENOTSUP
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+ * return 0, or negative errno code
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*/
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static int pwm_qmsi_set_values (struct device * dev , int access_op ,
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- uint32_t pwm , uint32_t on , uint32_t off )
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+ uint32_t pwm , uint32_t on , uint32_t off )
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{
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- int i ;
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+ uint32_t * channel_period = dev -> config -> config_info ;
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+ int i , high , low ;
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- if (off == 0 ) {
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- on -- ;
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- off = 1 ;
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+ if (on ) {
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+ return - EINVAL ;
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}
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switch (access_op ) {
@@ -192,13 +195,40 @@ static int pwm_qmsi_set_values(struct device *dev, int access_op,
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if (pwm >= CONFIG_PWM_QMSI_NUM_PORTS ) {
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return - EIO ;
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}
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- return __set_one_port (dev , QM_PWM_0 , pwm , on , off );
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+
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+ high = off ;
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+ low = channel_period [pwm ] - off ;
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+
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+ if (off >= channel_period [pwm ]) {
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+ high = channel_period [pwm ] - 1 ;
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+ low = 1 ;
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+ }
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+
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+ if (off == 0 ) {
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+ high = 1 ;
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+ low = channel_period [pwm ] - 1 ;
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+ }
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+
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+ return __set_one_port (dev , QM_PWM_0 , pwm , high , low );
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case PWM_ACCESS_ALL :
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for (i = 0 ; i < CONFIG_PWM_QMSI_NUM_PORTS ; i ++ ) {
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- __set_one_port (dev , QM_PWM_0 , i , on , off );
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+ high = off ;
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+ low = channel_period [i ] - off ;
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+
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+ if (off >= channel_period [i ]) {
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+ high = channel_period [i ] - 1 ;
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+ low = 1 ;
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+ }
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+
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+ if (off == 0 ) {
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+ high = 1 ;
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+ low = channel_period [i ] - 1 ;
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+ }
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+
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+ return __set_one_port (dev , QM_PWM_0 , i , high , low );
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}
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- break ;
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+ break ;
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default :
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return - ENOTSUP ;
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}
@@ -208,7 +238,7 @@ static int pwm_qmsi_set_values(struct device *dev, int access_op,
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}
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static int pwm_qmsi_set_period (struct device * dev , int access_op ,
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- uint32_t pwm , uint32_t period )
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+ uint32_t pwm , uint32_t period )
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{
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uint32_t * channel_period = dev -> config -> config_info ;
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int ret_val = 0 ;
@@ -295,12 +325,23 @@ static int pwm_qmsi_set_duty_cycle(struct device *dev, int access_op,
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return 0 ;
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}
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+ static int pwm_qmsi_set_phase (struct device * dev , int access_op ,
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+ uint32_t pwm , uint8_t phase )
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+ {
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+ ARG_UNUSED (dev );
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+ ARG_UNUSED (access_op );
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+ ARG_UNUSED (pwm );
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+ ARG_UNUSED (phase );
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+
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+ return - ENOTSUP ;
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+ }
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static struct pwm_driver_api pwm_qmsi_drv_api_funcs = {
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.config = pwm_qmsi_configure ,
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.set_values = pwm_qmsi_set_values ,
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.set_period = pwm_qmsi_set_period ,
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.set_duty_cycle = pwm_qmsi_set_duty_cycle ,
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+ .set_phase = pwm_qmsi_set_phase
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};
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static int pwm_qmsi_init (struct device * dev )
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