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doc: release notes: ARC
2.4 release notes for ARC related changes Signed-off-by: Ruud Derwig <[email protected]>
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doc/releases/release-notes-2.4.rst

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* ARC:
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* Added ARC MetaWare toolchain support
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* General arch improvements for stacks & memory domains
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* API improvements for cache flush and cache invalidate
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* Debugging help: show all registers on exception
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* Fix for fast irq (one register bank configuration)
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* Fix for undefined shift behavior (CID 211523)
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* ARM:
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* ARM Cortex-M1/M3 DesignStart FPGA
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* NXP i.MX RT685, i.MX8M Mini, and LPC11U6x
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* ARC QEMU support for EM and HS family
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* Made these changes in other SoC series:
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* STM32L4/STM32WB: Added support for Low Power Mode
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* STM32H7/STM32WB/STM32MP1: Added Dual Core concurrent register access
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protection using HSEM
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* Increase cpu frequency for ARC nsim_hs_smp
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* Changes for ARC boards:
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* ARC QEMU boards for ARC EM and HS
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* ARC MetaWare toolchain support, including mdb runner for various ARC boards
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* gcov coverage support for ARC QEMU
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* New nSIM configuration, corresponding to em7d_v22 EMSK board
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* Enable SMP on HSDK board, including dual core and quad core configurations
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* Switch from legacy ARC-nSIM UART to ns16550 UART model and driver
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* Fix EMSDP secure config for emsdp_em7d_esp
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* Added support for these ARM boards:
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Build and Infrastructure
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************************
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* Improved support for additional toolchains
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* Better toolchain abstractions
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* Support for the ARC MetaWare toolchain
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* Devicetree:
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* Added new devicetree macros that provide a default value if the property
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to allow applications an easy way to specify application specific
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devicetree properties without having a binding.
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* Support for multiple SOC and ARCH roots.
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The :ref:`SOC_ROOT <application>` and ``ARCH_ROOT`` variables used to specify
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support files for out of tree SoCs and architectures now accept multiple

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