Skip to content

Commit 9db4953

Browse files
tiennguyenzgkartben
authored andcommitted
boards: renesas: Add minimal support for Renesas RZ/V2H-EVK M33 core
Add minimal support for Renesas RZ/V2H-EVK M33 core Signed-off-by: Tien Nguyen <[email protected]> Signed-off-by: Quang Le <[email protected]>
1 parent 58e58a8 commit 9db4953

9 files changed

+320
-0
lines changed
Lines changed: 5 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,5 @@
1+
# Copyright (c) 2025 Renesas Electronics Corporation
2+
# SPDX-License-Identifier: Apache-2.0
3+
4+
config BOARD_RZV2H_EVK
5+
select SOC_R9A09G057H44GBG_CM33 if BOARD_RZV2H_EVK_R9A09G057H44GBG_CM33

boards/renesas/rzv2h_evk/board.cmake

Lines changed: 8 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,8 @@
1+
# Copyright (c) 2025 Renesas Electronics Corporation
2+
# SPDX-License-Identifier: Apache-2.0
3+
4+
if(CONFIG_BOARD_RZV2H_EVK_R9A09G057H44GBG_CM33)
5+
board_runner_args(jlink "--device=R9A09G057H44_M33_0")
6+
endif()
7+
8+
include(${ZEPHYR_BASE}/boards/common/jlink.board.cmake)

boards/renesas/rzv2h_evk/board.yml

Lines changed: 6 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,6 @@
1+
board:
2+
name: rzv2h_evk
3+
full_name: RZ/V2H Evaluation Board Kit
4+
vendor: renesas
5+
socs:
6+
- name: r9a09g057h44gbg
Lines changed: 212 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,212 @@
1+
.. zephyr:board:: rzv2h_evk
2+
3+
Overview
4+
********
5+
6+
The RZ/V2H high-end AI MPU boasts Renesas' proprietary dynamically reconfigurable processor AI accelerator (DRP-AI3),
7+
quad Arm Cortex-A55 (1.8GHz) Linux processors, and dual Cortex-R8 (800MHz) real-time processors.
8+
Furthermore, the RZ/V2H also includes another dynamically reconfigurable processor (DRP).
9+
This processor can accelerate image processing, such as OpenCV, and dynamics calculations required for robotics applications.
10+
It also features high-speed interfaces like PCIe, USB 3.2, and Gigabit Ethernet,
11+
making it an ideal microprocessor for applications such as autonomous robots and machine vision in factory automation,
12+
where advanced AI processing must be implemented with low power consumption.
13+
14+
* RZ/V2H Secure Evaluation Board (CPU Board)
15+
16+
* PMIC: RAA215300
17+
* Clock generator: 5L35023B
18+
* Main memory: LPDDR4X 8GB x 2
19+
* xSPI Flash memory: 64MB
20+
* External memory: Micro SD x 2
21+
* High-speed interface:
22+
23+
* Gigabit Ethernet x 2 ports
24+
* USB 3.2 Gen2 x 2ch (Host only)
25+
* USB 2.0 x 2ch (On-the-Go (OTG) x 1ch, Host x 1ch)
26+
* PCIe Gen3 x 1ch (4 lanes max)
27+
* MIPI CSI-2 x 4ch
28+
* MIPI DSI x 1ch
29+
* GPIO: 86 pins
30+
31+
* RZ/V2H-EVK Expansion Board (EXP Board):
32+
33+
* HDMI Tx x 1
34+
* Audio AUX connector x 1ch
35+
* Audio MIC connector x 1ch
36+
* Audio HP connector x 1ch
37+
* Pmod x 4
38+
39+
Hardware
40+
********
41+
42+
The Renesas RZ/V2H documentation can be found at `RZ/V2H Group Website`_
43+
44+
.. figure:: rzv2h_block_diagram.webp
45+
:width: 600px
46+
:align: center
47+
:alt: RZ/V2H group feature
48+
49+
RZ/V2H block diagram (Credit: Renesas Electronics Corporation)
50+
51+
Detailed hardware features for the board can be found at `RZV2H-EVK Website`_
52+
53+
Supported Features
54+
==================
55+
56+
.. zephyr:board-supported-hw::
57+
58+
Connections and IOs
59+
===================
60+
61+
By default, the board is configured for use with:
62+
63+
SCI_UART
64+
--------
65+
66+
* SCI_UART0:
67+
68+
* TX = Pmod 3A pin 2
69+
* RX = Pmod 3A pin 3
70+
71+
LED
72+
---
73+
74+
* LED5 (yelow) = P0_0
75+
* LED6 (yelow) = P0_1
76+
77+
Programming and Debugging (M33)
78+
*******************************
79+
80+
.. zephyr:board-supported-runners::
81+
82+
Applications for the ``rzv2h_evk`` board can be built in the usual way as
83+
documented in :ref:`build_an_application`.
84+
85+
Console
86+
=======
87+
88+
The UART port for Cortex-M33 System Core can be accessed by connecting `Pmod USBUART <https://store.digilentinc.com/pmod-usbuart-usb-to-uart-interface/>`_
89+
to the upper side of ``PMOD Type 3A``.
90+
91+
Debugging
92+
=========
93+
94+
It is possible to load and execute a Zephyr application binary on
95+
this board on the Cortex-M33 System Core from
96+
the internal SRAM, using ``JLink`` debugger (:ref:`jlink-debug-host-tools`).
97+
98+
Here is an example for building and debugging with the :zephyr:code-sample:`hello_world` application.
99+
100+
.. zephyr-app-commands::
101+
:zephyr-app: samples/hello_world
102+
:board: rzv2h_evk/r9a09g057h44gbg/cm33
103+
:goals: build debug
104+
105+
Flashing
106+
========
107+
108+
RZ/V2H-EVK is designed to start different systems on different cores.
109+
It uses Yocto as the build system to build Linux system and boot loaders
110+
to run Zephyr on Cortex-M33 with u-boot. The minimal steps are described below.
111+
112+
1. Download Multi-OS Package from the `RZ/V2H Easy Download Guide`_
113+
114+
2. Unzip Multi-OS Package then open "r01qs0077ej****-rzv2h-multi-os-pkg" PDF file.
115+
116+
3. Follow "3.2 Integration of Multi-OS Package related stuff" to build RZ/V2H AI SDK Source Code.
117+
Uncomment the following lines in **meta-rz-features/meta-rz-multi-os/meta-rzv2h/conf/layer.conf**.
118+
119+
.. code-block:: console
120+
121+
#MACHINE_FEATURES_append = " RZV2H_CM33_BOOT"
122+
MACHINE_FEATURES_append = " SRAM_REGION_ACCESS"
123+
#MACHINE_FEATURES_append = " CM33_FIRMWARE_LOAD"
124+
#MACHINE_FEATURES_append = " CA55_CPU_CLOCKUP"
125+
126+
The below necessary artifacts will be located in the build/tmp/deploy/image
127+
128+
+---------------+-------------------------------------------------+
129+
| Artifacts | File name |
130+
+===============+=================================================+
131+
| Boot loader | bl2_bp_spi-rzv2h-evk-ver1.srec |
132+
| | |
133+
| | fip-rzv2h-evk-ver1.srec |
134+
+---------------+-------------------------------------------------+
135+
| Flash Writer | Flash_Writer_SCIF_RZV2H_DEV_INTERNAL_MEMORY.mot |
136+
+---------------+-------------------------------------------------+
137+
| SD card image | core-image-weston-rzv2h-evk-ver1.wic.bmap |
138+
| | |
139+
| | core-image-weston-rzv2h-evk-ver1.wic.gz |
140+
+---------------+-------------------------------------------------+
141+
142+
4. Carry out 1-9 of Step "1-B Write the Linux files to SD card" at `Step 7 Deploy AI Application`_ to prepare SD card.
143+
144+
5. Run the following commands to write **zephyr.bin** to SD card.
145+
146+
.. code-block:: console
147+
148+
$ sudo mkdir /mnt/sd -p
149+
$ sudo mount /dev/sdb2 /mnt/sd
150+
$ sudo cp /path/to/zephyr.bin /mnt/sd/boot
151+
$ sync
152+
$ sudo umount /mnt/sd
153+
154+
.. warning::
155+
156+
Change ``/dev/sdb`` to your microSD card device name. Use ``dh -h`` to check.
157+
158+
6. Insert the SD card into SD1 of RZ/V2H EVK, set up board at eSD mode (DSW1[4:5] = ON, OFF).
159+
160+
7. Turn on the board carefully, see "3.2.2.4 Power Supply" in `Getting Started with Flexible Software Package`_
161+
Then, you should see the following message on the console associated with CN12 of RZ/V2H EVK.
162+
163+
.. code-block:: console
164+
165+
U-Boot 2021.10 (Jun 14 2024 - 18:14:19 +0000)
166+
CPU: Renesas Electronics CPU rev 1.0
167+
Model: Renesas EVK Version 1 based on r9a09g057h4
168+
DRAM: 15.9 GiB
169+
MMC: mmc@15c00000: 0, mmc@15c10000: 1(snip)
170+
Net: eth0: ethernet@15c30000, eth1: ethernet@15c40000
171+
Hit any key to stop autoboot: 3
172+
173+
8. Hit any key within 3 sec to stop autoboot.
174+
175+
9. Carry out the following setup of u-boot to kick CM33 Core.
176+
177+
.. code-block:: console
178+
179+
=> setenv cm33start 'dcache off
180+
=> mw.l 0x10420D2C 0x02000000
181+
=> mw.l 0x1043080c 0x08003000
182+
=> mw.l 0x10430810 0x18003000
183+
=> mw.l 0x10420604 0x00040004
184+
=> mw.l 0x10420C1C 0x00003100
185+
=> mw.l 0x10420C0C 0x00000001
186+
=> mw.l 0x10420904 0x00380008
187+
=> mw.l 0x10420904 0x00380038
188+
=> ext4load mmc 0:2 0x08003000 boot/zephyr.bin
189+
=> mw.l 0x10420C0C 0x00000000
190+
=> dcache on'
191+
=> saveenv
192+
=> run cm33start
193+
194+
References
195+
**********
196+
197+
.. target-notes::
198+
199+
.. _RZ/V2H Easy Download Guide:
200+
https://www.renesas.com/en/document/gde/rzv2h-easy-download-guide
201+
202+
.. _Step 7 Deploy AI Application:
203+
https://renesas-rz.github.io/rzv_ai_sdk/5.00/getting_started_v2h.html#step7
204+
205+
.. _Getting Started with Flexible Software Package:
206+
https://www.renesas.com/en/document/apn/rzv-getting-started-flexible-software-package
207+
208+
.. _RZV2H-EVK Website:
209+
https://www.renesas.com/en/products/microcontrollers-microprocessors/rz-mpus/rzv2h-evk-rzv2h-quad-core-vision-ai-mpu-evaluation-kit
210+
211+
.. _RZ/V2H Group Website:
212+
https://www.renesas.com/en/products/microcontrollers-microprocessors/rz-mpus/rzv2h-quad-core-vision-ai-mpu-drp-ai3-accelerator-and-high-performance-real-time-processor
Binary file not shown.
22.3 KB
Binary file not shown.
Lines changed: 67 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,67 @@
1+
/*
2+
* Copyright (c) 2025 Renesas Electronics Corporation
3+
* SPDX-License-Identifier: Apache-2.0
4+
*/
5+
6+
/dts-v1/;
7+
8+
#include <zephyr/dt-bindings/memory-attr/memory-attr-arm.h>
9+
#include <zephyr/dt-bindings/input/input-event-codes.h>
10+
#include <zephyr/dt-bindings/gpio/renesas-rz-gpio.h>
11+
#include <arm/renesas/rz/rzv/r9a09g057_cm33.dtsi>
12+
#include "rzv2h_evk-pinctrl.dtsi"
13+
14+
/ {
15+
model = "Renesas RZ/V2H EVK";
16+
compatible = "renesas,rzv2h-evk";
17+
18+
aliases {
19+
led0 = &led5;
20+
led1 = &led6;
21+
};
22+
23+
chosen {
24+
zephyr,sram = &sram;
25+
zephyr,console = &uart0;
26+
zephyr,shell-uart = &uart0;
27+
};
28+
29+
leds {
30+
compatible = "gpio-leds";
31+
32+
led5: led5 {
33+
gpios = <&gpio0 0 0>;
34+
label = "led5";
35+
};
36+
37+
led6: led6 {
38+
gpios = <&gpio0 1 0>;
39+
label = "led6";
40+
};
41+
};
42+
43+
ddr: memory@80000000 {
44+
compatible = "mmio-sram";
45+
reg = <0x80000000 DT_SIZE_M(256)>;
46+
};
47+
48+
sram: memory@8003000 {
49+
compatible = "mmio-sram";
50+
reg = <0x08003000 0xfbfff>;
51+
};
52+
};
53+
54+
&gpio0 {
55+
status = "okay";
56+
};
57+
58+
&sci0 {
59+
pinctrl-0 = <&sci0_pins>;
60+
pinctrl-names = "default";
61+
status = "okay";
62+
63+
uart0: uart {
64+
current-speed = <115200>;
65+
status = "okay";
66+
};
67+
};
Lines changed: 11 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,11 @@
1+
identifier: rzv2h_evk/r9a09g057h44gbg/cm33
2+
name: Cortex-M33 for Renesas RZ/V2H EVK
3+
type: mcu
4+
arch: arm
5+
toolchain:
6+
- zephyr
7+
- gnuarmemb
8+
supported:
9+
- uart
10+
- gpio
11+
vendor: renesas
Lines changed: 11 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,11 @@
1+
# Copyright (c) 2025 Renesas Electronics Corporation
2+
# SPDX-License-Identifier: Apache-2.0
3+
4+
CONFIG_XIP=n
5+
6+
# Enable UART driver
7+
CONFIG_SERIAL=y
8+
9+
# Enable console
10+
CONFIG_CONSOLE=y
11+
CONFIG_UART_CONSOLE=y

0 commit comments

Comments
 (0)