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ZhaoxiangJinZhaoxiangJin
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boards: nxp: Move board specific files from hal to zephyr
Move board specific files (dcd, flash_config, etc.) from nxp hal repo to zephyr repo. Signed-off-by: Zhaoxiang Jin <[email protected]>
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‎boards/nxp/frdm_mcxn947/CMakeLists.txt

Lines changed: 2 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -10,7 +10,6 @@ zephyr_library_sources(board.c)
1010
if(CONFIG_FLEXSPI_CONFIG_BLOCK_OFFSET)
1111
# Include flash configuration block
1212
zephyr_compile_definitions(XIP_BOOT_HEADER_ENABLE=1)
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set(BOARD_DIR "${ZEPHYR_HAL_NXP_MODULE_DIR}/mcux/mcux-sdk-ng/boards/frdmmcxn947")
14-
zephyr_library_sources(${BOARD_DIR}/xip/mcxn_flexspi_nor_config.c)
15-
zephyr_library_include_directories(${BOARD_DIR}/xip)
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zephyr_library_sources(xip/mcxn_flexspi_nor_config.c)
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zephyr_library_include_directories(xip)
1615
endif()

‎boards/nxp/frdm_mcxn947/xip/mcxn_flexspi_nor_config.c

Lines changed: 151 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,151 @@
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/*
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* Copyright 2018-2022 NXP
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* All rights reserved.
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include "mcxn_flexspi_nor_config.h"
9+
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/* Component ID definition, used by tools. */
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#ifndef FSL_COMPONENT_ID
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#define FSL_COMPONENT_ID "platform.drivers.xip_board"
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#endif
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/*******************************************************************************
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* Code
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******************************************************************************/
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#if defined(__CC_ARM) || defined(__ARMCC_VERSION) || defined(__GNUC__)
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__attribute__((section(".flexspi_fcb"), used))
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#elif defined(__ICCARM__)
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#pragma location = ".flexspi_fcb"
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#endif
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#ifndef FLEXSPI_USE_CUSTOM_FCB
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#define FLEXSPI_USE_CUSTOM_FCB (0)
27+
#endif
28+
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#if FLEXSPI_USE_CUSTOM_FCB
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/* FCB for W25Q64 */
31+
const uint8_t CUSTOM_FCB[] = {
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0x46, 0x43, 0x46, 0x42, 0x00, 0x04, 0x01, 0x56, 0x00, 0x00, 0x00, 0x00, 0x01, 0x03, 0x03,
33+
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
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0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
35+
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
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0x00, 0x00, 0x00, 0x00, 0x10, 0x00, 0x00, 0x00, 0x01, 0x04, 0x01, 0x00, 0x00, 0x00, 0x00,
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0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
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0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
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0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
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0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xeb, 0x04, 0x18, 0x0a, 0x06, 0x32, 0x04,
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0x26, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x05, 0x04, 0x04, 0x24, 0x00, 0x00,
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0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
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0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x06, 0x04, 0x00, 0x00,
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0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
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0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x20, 0x04,
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0x18, 0x08, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
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0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
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0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
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0x00, 0xd8, 0x04, 0x18, 0x08, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
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0x00, 0x00, 0x02, 0x04, 0x18, 0x08, 0x04, 0x20, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
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0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
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0x00, 0x00, 0x00, 0x00, 0x60, 0x04, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
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0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
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0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
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0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
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0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
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0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
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0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
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0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
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0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
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0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01,
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0x00, 0x00, 0x00, 0x10, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
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0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
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0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
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0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
66+
0x00, 0x00};
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#else
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/* FCB for W25Q64 */
70+
const flexspi_nor_image_config
71+
image_config =
72+
{.image_version = 0xFFFE0001u,
73+
.fcb_config =
74+
{
75+
.memConfig =
76+
{
77+
.tag = FLEXSPI_CFG_BLK_TAG,
78+
.version = FLEXSPI_CFG_BLK_VERSION,
79+
.readSampleClkSrc =
80+
kFlexSPIReadSampleClk_LoopbackFromDqsPad,
81+
.csHoldTime = 3u,
82+
.csSetupTime = 3u,
83+
// Enable DDR mode, Wordaddassable, Safe
84+
// configuration, Differential clock
85+
.controllerMiscOption = (1u
86+
<< kFlexSpiMiscOffset_SafeConfigFreqEnable),
87+
.deviceType = kFlexSpiDeviceType_SerialNOR,
88+
.sflashPadType = kSerialFlash_4Pads,
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.serialClkFreq = kFlexSpiSerialClk_75MHz,
90+
.sflashA1Size = 8u * 1024u * 1024u,
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.lookupTable =
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{
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// Read LUTs
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[0] =
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FLEXSPI_LUT_SEQ(CMD_SDR,
96+
FLEXSPI_1PAD,
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0xEB,
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RADDR_SDR, FLEXSPI_4PAD, 0x18),
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[1] =
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FLEXSPI_LUT_SEQ(DUMMY_SDR,
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FLEXSPI_4PAD, 0x06,
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READ_SDR, FLEXSPI_4PAD, 0x04),
103+
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// Read Status LUTs
105+
[4 * 1 + 0] =
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FLEXSPI_LUT_SEQ(CMD_SDR,
107+
FLEXSPI_1PAD,
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0x05, READ_SDR, FLEXSPI_1PAD, 0x04),
109+
110+
// Write Enable LUTs
111+
[4 * 3 + 0] =
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FLEXSPI_LUT_SEQ(CMD_SDR,
113+
FLEXSPI_1PAD,
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0x06, STOP, FLEXSPI_1PAD, 0x0),
115+
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// Erase Sector LUTs
117+
[4 * 5 + 0] =
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FLEXSPI_LUT_SEQ(CMD_SDR,
119+
FLEXSPI_1PAD,
120+
0x20, RADDR_SDR, FLEXSPI_1PAD, 0x18),
121+
122+
// Erase Block LUTs
123+
[4 * 8 + 0] =
124+
FLEXSPI_LUT_SEQ(CMD_SDR,
125+
FLEXSPI_1PAD,
126+
0xD8, RADDR_SDR, FLEXSPI_1PAD, 0x18),
127+
128+
// Pape Program LUTs
129+
[4 * 9 + 0] =
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FLEXSPI_LUT_SEQ(CMD_SDR,
131+
FLEXSPI_1PAD,
132+
0x02, RADDR_SDR, FLEXSPI_1PAD, 0x18),
133+
[4 * 9 +
134+
1] = FLEXSPI_LUT_SEQ(WRITE_SDR,
135+
FLEXSPI_1PAD, 0x04,
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STOP, FLEXSPI_1PAD, 0x0),
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138+
// Erase Chip LUTs
139+
[4 * 11 + 0] =
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FLEXSPI_LUT_SEQ(CMD_SDR,
141+
FLEXSPI_1PAD,
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0x60, STOP, FLEXSPI_1PAD, 0x0),
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},
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},
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.pageSize = 256u,
146+
.sectorSize = 4u * 1024u,
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.ipcmdSerialClkFreq = 1u,
148+
.blockSize = 64u * 1024u,
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.isUniformBlockSize = false,
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}};
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#endif

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