boards: mr_canhubk3: add support adc

Add device tree of adc instances for s32k344

Signed-off-by: Cong Nguyen Huu <[email protected]>

Author: congnguyenhuu

boards/arm/mr_canhubk3/doc/index.rst

@@ -52,6 +52,7 @@ LPUART        on-chip     serial
 QSPI          on-chip     flash
 FLEXCAN       on-chip     can
 LPI2C         on-chip     i2c
+ADC SAR       on-chip     adc
 ============  ==========  ================================
 
 The default configuration can be found in the Kconfig file
@@ -191,6 +192,15 @@ P4.3       PTD14  LPI2C0_SCL
 P4.4       PTD13  LPI2C0_SDA
 =========  =====  ============
 
+ADC
+===
+
+ADC is provided through ADC SAR controller with 3 instances. ADC channels are divided into
+3 groups (precision, standard and external).
+
+.. note::
+   All channels of an instance only run on 1 group channel at the same time.
+
 FS26 SBC Watchdog
 =================
 

boards/arm/mr_canhubk3/mr_canhubk3.yaml

@@ -14,3 +14,4 @@ supported:
   - uart
   - can
   - i2c
+  - adc

dts/arm/nxp/nxp_s32k344_m7.dtsi

@@ -505,6 +505,30 @@
 			interrupts = <162 0>;
 			status = "disabled";
 		};
+
+		adc0: adc@400a0000 {
+			compatible = "nxp,s32-adc-sar";
+			reg = <0x400a0000 0x1000>;
+			interrupts = <180 0>;
+			#io-channel-cells = <1>;
+			status = "disabled";
+		};
+
+		adc1: adc@400a4000 {
+			compatible = "nxp,s32-adc-sar";
+			reg = <0x400a4000 0x1000>;
+			interrupts = <181 0>;
+			#io-channel-cells = <1>;
+			status = "disabled";
+		};
+
+		adc2: adc@400a8000 {
+			compatible = "nxp,s32-adc-sar";
+			reg = <0x400a8000 0x1000>;
+			interrupts = <182 0>;
+			#io-channel-cells = <1>;
+			status = "disabled";
+		};
 	};
 };