drivers: spi: esp32/s2: add DMA support

Add SPI DMA support for esp32/s2.

Signed-off-by: Lucas Tamborrino <[email protected]>

Author: LucasTambor

drivers/spi/spi_esp32_spim.c

@@ -14,6 +14,7 @@
 LOG_MODULE_REGISTER(esp32_spi, CONFIG_SPI_LOG_LEVEL);
 
 #include <soc.h>
+#include <soc/soc_memory_types.h>
 #include <zephyr/drivers/spi.h>
 #ifndef CONFIG_SOC_ESP32C3
 #include <zephyr/drivers/interrupt_controller/intc_esp32.h>
@@ -55,19 +56,48 @@ static inline void spi_esp32_complete(const struct device *dev,
 static int IRAM_ATTR spi_esp32_transfer(const struct device *dev)
 {
 	struct spi_esp32_data *data = dev->data;
+	const struct spi_esp32_config *cfg = dev->config;
 	struct spi_context *ctx = &data->ctx;
 	spi_hal_context_t *hal = &data->hal;
 	spi_hal_dev_config_t *hal_dev = &data->dev_config;
 	spi_hal_trans_config_t *hal_trans = &data->trans_config;
 	size_t chunk_len = spi_context_max_continuous_chunk(&data->ctx);
 	chunk_len = MIN(chunk_len, SOC_SPI_MAXIMUM_BUFFER_SIZE);
+	size_t bit_len = chunk_len << 3;
+	uint8_t *rx_temp = NULL;
+	uint8_t *tx_temp = NULL;
+
+	if (cfg->dma_enabled) {
+		/* bit_len needs to be at least one byte long when using DMA */
+		bit_len = !bit_len ? 8 : bit_len;
+		if (ctx->tx_buf && !esp_ptr_dma_capable((uint32_t *)&ctx->tx_buf[0])) {
+			tx_temp = k_malloc(ctx->tx_len);
+			if (!tx_temp) {
+				LOG_ERR("Error allocating temp buffer Tx");
+				return -ENOMEM;
+			}
+			memcpy(tx_temp, &ctx->tx_buf[0], ctx->tx_len);
+		}
+		if (ctx->rx_buf && (!esp_ptr_dma_capable((uint32_t *)&ctx->rx_buf[0]) ||
+				    ((int)&ctx->rx_buf[0] % 4 != 0))) {
+			/* The rx buffer need to be length of
+			 * multiples of 32 bits to avoid heap
+			 * corruption.
+			 */
+			rx_temp = k_calloc(((ctx->rx_len << 3) + 31) / 8, sizeof(uint8_t));
+			if (!rx_temp) {
+				LOG_ERR("Error allocating temp buffer Rx");
+				return -ENOMEM;
+			}
+		}
+	}
 
 	/* clean up and prepare SPI hal */
-	memset((uint32_t *) hal->hw->data_buf, 0, sizeof(hal->hw->data_buf));
-	hal_trans->send_buffer = (uint8_t *) ctx->tx_buf;
-	hal_trans->rcv_buffer = ctx->rx_buf;
-	hal_trans->tx_bitlen = chunk_len << 3;
-	hal_trans->rx_bitlen = chunk_len << 3;
+	memset((uint32_t *)hal->hw->data_buf, 0, sizeof(hal->hw->data_buf));
+	hal_trans->send_buffer = tx_temp ? tx_temp : (uint8_t *)ctx->tx_buf;
+	hal_trans->rcv_buffer = rx_temp ? rx_temp : ctx->rx_buf;
+	hal_trans->tx_bitlen = bit_len;
+	hal_trans->rx_bitlen = bit_len;
 
 	/* configure SPI */
 	spi_hal_setup_trans(hal, hal_dev, hal_trans);
@@ -83,8 +113,21 @@ static int IRAM_ATTR spi_esp32_transfer(const struct device *dev)
 
 	/* read data */
 	spi_hal_fetch_result(hal);
+
+	if (rx_temp) {
+		memcpy(&ctx->rx_buf[0], rx_temp, chunk_len);
+	}
+
 	spi_context_update_rx(&data->ctx, data->dfs, chunk_len);
 
+	if (tx_temp) {
+		k_free(tx_temp);
+	}
+
+	if (rx_temp) {
+		k_free(rx_temp);
+	}
+
 	return 0;
 }
 
@@ -103,6 +146,42 @@ static void IRAM_ATTR spi_esp32_isr(void *arg)
 }
 #endif
 
+static int spi_esp32_init_dma(const struct device *dev)
+{
+	const struct spi_esp32_config *cfg = dev->config;
+	struct spi_esp32_data *data = dev->data;
+
+	LOG_ERR("DMA");
+	if (clock_control_on(cfg->clock_dev, (clock_control_subsys_t)cfg->dma_clk_src)) {
+		LOG_ERR("Could not enable DMA clock");
+		return -EIO;
+	}
+
+#ifdef CONFIG_SOC_ESP32
+	/*Connect SPI and DMA*/
+	DPORT_SET_PERI_REG_BITS(DPORT_SPI_DMA_CHAN_SEL_REG, 3, cfg->dma_host + 1,
+				((cfg->dma_host + 1) * 2));
+#endif /* CONFIG_SOC_ESP32 */
+
+	data->hal_config.dma_in = (spi_dma_dev_t *)cfg->spi;
+	data->hal_config.dma_out = (spi_dma_dev_t *)cfg->spi;
+	data->hal_config.dma_enabled = true;
+	data->hal_config.tx_dma_chan = cfg->dma_host + 1;
+	data->hal_config.rx_dma_chan = cfg->dma_host + 1;
+	data->hal_config.dmadesc_n = 1;
+	data->hal_config.dmadesc_rx = &data->dma_desc_rx;
+	data->hal_config.dmadesc_tx = &data->dma_desc_tx;
+
+	if (data->hal_config.dmadesc_tx == NULL || data->hal_config.dmadesc_rx == NULL) {
+		k_free(data->hal_config.dmadesc_tx);
+		k_free(data->hal_config.dmadesc_rx);
+		return -ENOMEM;
+	}
+
+	spi_hal_init(&data->hal, cfg->dma_host + 1, &data->hal_config);
+	return 0;
+}
+
 static int spi_esp32_init(const struct device *dev)
 {
 	int err;
@@ -113,6 +192,10 @@ static int spi_esp32_init(const struct device *dev)
 		return -EINVAL;
 	}
 
+	if (cfg->dma_enabled) {
+		spi_esp32_init_dma(dev);
+	}
+
 #ifdef CONFIG_SPI_ESP32_INTERRUPT
 	data->irq_line = esp_intr_alloc(cfg->irq_source,
 			0,
@@ -382,6 +465,9 @@ static const struct spi_driver_api spi_api = {
 		.clock_subsys =	\
 			(clock_control_subsys_t)DT_INST_CLOCKS_CELL(idx, offset),	\
 		.use_iomux = DT_INST_PROP(idx, use_iomux),	\
+		.dma_enabled = DT_INST_PROP(idx, dma_enabled),	\
+		.dma_clk_src = DT_INST_PROP(idx, dma_clk),	\
+		.dma_host = DT_INST_PROP(idx, dma_host),	\
 	};	\
 		\
 	DEVICE_DT_INST_DEFINE(idx, &spi_esp32_init,	\

drivers/spi/spi_esp32_spim.h

@@ -8,6 +8,7 @@
 #define ZEPHYR_DRIVERS_SPI_ESP32_SPIM_H_
 
 #include <zephyr/drivers/pinctrl.h>
+#include <hal/spi_hal.h>
 
 #define SPI_MASTER_FREQ_8M      (APB_CLK_FREQ/10)
 #define SPI_MASTER_FREQ_9M      (APB_CLK_FREQ/9)    /* 8.89MHz */
@@ -29,16 +30,22 @@ struct spi_esp32_config {
 	const struct pinctrl_dev_config *pcfg;
 	clock_control_subsys_t clock_subsys;
 	bool use_iomux;
+	bool dma_enabled;
+	int dma_clk_src;
+	int dma_host;
 };
 
 struct spi_esp32_data {
 	struct spi_context ctx;
 	spi_hal_context_t hal;
+	spi_hal_config_t hal_config;
 	spi_hal_timing_conf_t timing_config;
 	spi_hal_dev_config_t dev_config;
 	spi_hal_trans_config_t trans_config;
 	uint8_t dfs;
 	int irq_line;
+	lldesc_t dma_desc_tx;
+	lldesc_t dma_desc_rx;
 };
 
 #endif /* ZEPHYR_DRIVERS_SPI_ESP32_SPIM_H_ */

dts/bindings/spi/espressif,esp32-spi.yaml

@@ -38,11 +38,21 @@ properties:
 
         Use MOSI for both sending and receiving data
 
-    dma:
+    dma-enabled:
       type: boolean
       required: false
       description: Enable SPI DMA support
 
+    dma-clk:
+      type: int
+      required: false
+      description: DMA clock source
+
+    dma-host:
+      type: int
+      required: false
+      description: DMA Host - 0 -> SPI2, 1 -> SPI3
+
     clk-as-cs:
       type: boolean
       required: false

dts/xtensa/espressif/esp32.dtsi

@@ -288,6 +288,8 @@
 			interrupts = <SPI2_INTR_SOURCE>;
 			interrupt-parent = <&intc>;
 			clocks = <&rtc ESP32_HSPI_MODULE>;
+			dma-clk = <ESP32_SPI_DMA_MODULE>;
+			dma-host = <0>;
 			status = "disabled";
 		};
 
@@ -297,6 +299,8 @@
 			interrupts = <SPI3_INTR_SOURCE>;
 			interrupt-parent = <&intc>;
 			clocks = <&rtc ESP32_VSPI_MODULE>;
+			dma-clk = <ESP32_SPI_DMA_MODULE>;
+			dma-host = <1>;
 			status = "disabled";
 		};
 

dts/xtensa/espressif/esp32s2.dtsi

@@ -221,6 +221,8 @@
 			interrupts = <SPI2_INTR_SOURCE>;
 			interrupt-parent = <&intc>;
 			clocks = <&rtc ESP32_FSPI_MODULE>;
+			dma-clk = <ESP32_SPI2_DMA_MODULE>;
+			dma-host = <0>;
 			status = "disabled";
 		};
 
@@ -230,6 +232,8 @@
 			interrupts = <SPI3_INTR_SOURCE>;
 			interrupt-parent = <&intc>;
 			clocks = <&rtc ESP32_HSPI_MODULE>;
+			dma-clk = <ESP32_SPI3_DMA_MODULE>;
+			dma-host = <1>;
 			status = "disabled";
 		};