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danieldegrassedleach02
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soc: rt11xx: Enable USDHC SD host controller on RT1170
Enable SD host controller driver for RT1170, so the EVK can use the new SD subsystem. Signed-off-by: Daniel DeGrasse <[email protected]>
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6 files changed

+20
-21
lines changed

6 files changed

+20
-21
lines changed

boards/arm/mimxrt1170_evk/Kconfig.defconfig

Lines changed: 1 addition & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -19,12 +19,9 @@ if DISK_DRIVERS
1919
config DISK_DRIVER_SDMMC
2020
default y
2121

22-
config SDMMC_USDHC_DAT3_PWR_TOGGLE
22+
config IMX_USDHC_DAT3_PWR_TOGGLE
2323
default y
2424

25-
config SDMMC_USDHC_DAT3_PWR_DELAY
26-
default 10
27-
2825
endif # DISK_DRIVERS
2926

3027
if FLASH

boards/arm/mimxrt1170_evk/mimxrt1170_evk_cm7.dts

Lines changed: 5 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -106,9 +106,13 @@
106106

107107
&usdhc1 {
108108
status = "okay";
109-
no-1-8-v;
110109
detect-dat3;
111110
pwr-gpios = <&gpio10 2 GPIO_ACTIVE_LOW>;
111+
mmc {
112+
compatible = "zephyr,sdmmc-disk";
113+
status = "okay";
114+
label = "SDMMC_0";
115+
};
112116
};
113117

114118
&edma0 {

boards/arm/teensy4/Kconfig.defconfig

Lines changed: 0 additions & 10 deletions
Original file line numberDiff line numberDiff line change
@@ -21,14 +21,4 @@ endchoice
2121
config DISK_DRIVER_SDMMC
2222
default y if DISK_DRIVERS
2323

24-
if DISK_DRIVER_SDMMC
25-
26-
config SDMMC_USDHC_DAT3_PWR_TOGGLE
27-
default y
28-
29-
config SDMMC_USDHC_DAT3_PWR_DELAY
30-
default 10
31-
32-
endif # DISK_DRIVER_SDMMC
33-
3424
endif # BOARD_TEENSY40 || BOARD_TEENSY41

drivers/clock_control/clock_control_mcux_ccm_rev2.c

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -55,7 +55,7 @@ static int mcux_ccm_get_subsys_rate(const struct device *dev,
5555
break;
5656
#endif
5757

58-
#if DT_NODE_HAS_STATUS(DT_NODELABEL(usdhc1), okay) && CONFIG_DISK_DRIVER_SDMMC
58+
#if DT_NODE_HAS_STATUS(DT_NODELABEL(usdhc1), okay) && CONFIG_IMX_USDHC
5959
case IMX_CCM_USDHC1_CLK:
6060
clock_root = kCLOCK_Root_Usdhc1 + instance;
6161
break;

dts/arm/nxp/nxp_rt11xx.dtsi

Lines changed: 12 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -775,21 +775,29 @@
775775
};
776776

777777
usdhc1: usdhc@40418000 {
778-
compatible = "nxp,imx-usdhc";
778+
compatible = "nxp,imx-sdhc";
779779
reg = <0x40418000 0x4000>;
780780
status = "disabled";
781781
interrupts = <133 0>;
782782
clocks = <&ccm IMX_CCM_USDHC1_CLK 0 0>;
783-
label = "USDHC_1";
783+
label = "SDHC_0";
784+
max-current-330 = <1020>;
785+
max-current-180 = <1020>;
786+
max-bus-freq = <208000000>;
787+
min-bus-freq = <400000>;
784788
};
785789

786790
usdhc2: usdhc@4041c000 {
787-
compatible = "nxp,imx-usdhc";
791+
compatible = "nxp,imx-sdhc";
788792
reg = <0x4041c000 0x4000>;
789793
status = "disabled";
790794
interrupts = <134 0>;
791795
clocks = <&ccm IMX_CCM_USDHC2_CLK 0 0>;
792-
label = "USDHC_2";
796+
label = "SDHC_1";
797+
max-current-330 = <1020>;
798+
max-current-180 = <1020>;
799+
max-bus-freq = <208000000>;
800+
min-bus-freq = <400000>;
793801
};
794802

795803
csi: csi@40800000 {

soc/arm/nxp_imx/rt/soc_rt11xx.c

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -428,7 +428,7 @@ static ALWAYS_INLINE void clock_init(void)
428428
USB_EhciPhyInit(kUSB_ControllerEhci1, CPU_XTAL_CLK_HZ, &usbPhyConfig);
429429
#endif
430430

431-
#if DT_NODE_HAS_STATUS(DT_NODELABEL(usdhc1), okay) && CONFIG_DISK_DRIVER_SDMMC
431+
#if DT_NODE_HAS_STATUS(DT_NODELABEL(usdhc1), okay) && CONFIG_IMX_USDHC
432432
/* Configure USDHC1 using SysPll2Pfd2*/
433433
rootCfg.mux = kCLOCK_USDHC1_ClockRoot_MuxSysPll2Pfd2;
434434
rootCfg.div = 2;

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