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doc: boards: osd32mp1_brk: fix bullet list formatting
add missing blank lines where needed in sub-bullet lists. Signed-off-by: Benjamin Cabé <[email protected]>
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boards/oct/osd32mp1_brk/doc/osd32mp1_brk.rst

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@@ -12,6 +12,7 @@ Zephyr OS is ported to run on the Cortex®-M4 core of the STM32MP157F.
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- OSD32MP15x SiP:
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- STM32MP15x microprocessor:
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- Dual-core Arm® Cortex®-A7 up to 800 MHz, 32 bits
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- Cortex®-M4 up to 209 MHz, 32 bits
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- Embedded SRAM (448 Kbytes) for Cortex®-M4.
@@ -23,10 +24,12 @@ Zephyr OS is ported to run on the Cortex®-M4 core of the STM32MP157F.
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- Over 100 passive components
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- Small form factor:
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- Dimensions: 75 mm x 46 mm (3 in x 1.8 in)
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- Breadboard-compatible with access to 106 I/Os via two 2x30 100-mil headers
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- Built-in features:
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- μUSB
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- ST-Link header
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- UART
@@ -59,9 +62,11 @@ The OSD32MP15x SiP in integration with the STM32MP17 SoC provides the following
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- 512 MB DDR3L memory (on SiP)
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- 708 Kbytes of internal SRAM:
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- 256 KB AXI SYSRAM
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- 384 KB AHB SRAM
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- 64 KB AHB SRAM in backup domain
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- Dual mode Quad-SPI memory interface
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- Flexible external memory controller with up to 16-bit data bus
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- Integrated 4 KB EEPROM (on SiP)
@@ -73,12 +78,16 @@ The OSD32MP15x SiP in integration with the STM32MP17 SoC provides the following
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- Clock management:
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- Internal oscillators:
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- 64 MHz HSI oscillator
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- 4 MHz CSI oscillator
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- 32 kHz LSI oscillator
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- External oscillators:
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- 8-48 MHz HSE oscillator
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- 32.768 kHz LSE oscillator
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- 6 × PLLs with fractional mode
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- MEMS oscillator (on SiP)
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