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lyakhlyakh
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cavs: (cosmetic) remove redundant LPRAM_* macros
LPRAM_BASE and LPRAM_SIZE are duplicates of LP_SRAM_BASE and LP_SRAM_SIZE respectively. Remove them and use LP_SRAM_* consistently everywhere. Signed-off-by: Guennadi Liakhovetski <[email protected]>
1 parent 61bf1b2 commit a53b228

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8 files changed

+32
-35
lines changed

8 files changed

+32
-35
lines changed

‎soc/xtensa/intel_adsp/cavs_v15/include/soc/memory.h‎

Lines changed: 4 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -92,10 +92,6 @@
9292
/* size of the Interrupt Descriptor Table (IDT) */
9393
#define IDT_SIZE 0x2000
9494

95-
/* low power ram where DMA buffers are typically placed */
96-
#define LPRAM_BASE (DT_REG_ADDR(DT_NODELABEL(sram1)))
97-
#define LPRAM_SIZE (DT_REG_SIZE(DT_NODELABEL(sram1)))
98-
9995
/* bootloader */
10096

10197
#define HP_SRAM_BASE 0xbe000000
@@ -215,4 +211,8 @@
215211
/* Host page size */
216212
#define HOST_PAGE_SIZE 4096
217213

214+
/* low power ram where DMA buffers are typically placed */
215+
#define LP_SRAM_BASE (DT_REG_ADDR(DT_NODELABEL(sram1)))
216+
#define LP_SRAM_SIZE (DT_REG_SIZE(DT_NODELABEL(sram1)))
217+
218218
#endif /* __INC_MEMORY_H */

‎soc/xtensa/intel_adsp/cavs_v15/linker.ld‎

Lines changed: 4 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -25,7 +25,7 @@ OUTPUT_ARCH(xtensa)
2525
PROVIDE(__memctl_default = 0x00000000);
2626
PROVIDE(_MemErrorHandler = 0x00000000);
2727

28-
#define LPRAM_REGION lpram
28+
#define LP_SRAM_REGION lpram
2929

3030
/* DSP RAM regions (all of them) are mapped twice on the DSP: once in
3131
* a 512MB region from 0x80000000-0x9fffffff and again from
@@ -123,8 +123,8 @@ MEMORY
123123
len = IDT_SIZE
124124
#endif
125125
lpram :
126-
org = LPRAM_BASE,
127-
len = LPRAM_SIZE
126+
org = LP_SRAM_BASE,
127+
len = LP_SRAM_SIZE
128128

129129
static_uuid_entries_seg (!ari) :
130130
org = UUID_ENTRY_ELF_BASE,
@@ -509,7 +509,7 @@ SECTIONS
509509
_dma_buf_start = ABSOLUTE(.);
510510
*(.dma_buffers)
511511
_dma_buf_end = ABSOLUTE(.);
512-
} >LPRAM_REGION
512+
} >LP_SRAM_REGION
513513
_heap_sentry = L2_SRAM_BASE + L2_SRAM_SIZE;
514514
.comment 0 : { *(.comment) }
515515
.debug 0 : { *(.debug) }

‎soc/xtensa/intel_adsp/cavs_v18/include/soc/memory.h‎

Lines changed: 4 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -89,10 +89,6 @@
8989
/* size of the Interrupt Descriptor Table (IDT) */
9090
#define IDT_SIZE 0x2000
9191

92-
/* low power ram where DMA buffers are typically placed */
93-
#define LPRAM_BASE (DT_REG_ADDR(DT_NODELABEL(sram1)))
94-
#define LPRAM_SIZE (DT_REG_SIZE(DT_NODELABEL(sram1)))
95-
9692
/* bootloader */
9793

9894
#define HP_SRAM_BASE 0xbe000000
@@ -217,4 +213,8 @@
217213

218214
#define SRAM_BANK_SIZE (64 * 1024)
219215

216+
/* low power ram where DMA buffers are typically placed */
217+
#define LP_SRAM_BASE (DT_REG_ADDR(DT_NODELABEL(sram1)))
218+
#define LP_SRAM_SIZE (DT_REG_SIZE(DT_NODELABEL(sram1)))
219+
220220
#endif /* __INC_MEMORY_H */

‎soc/xtensa/intel_adsp/cavs_v18/linker.ld‎

Lines changed: 4 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -27,7 +27,7 @@ PROVIDE(_MemErrorHandler = 0x00000000);
2727

2828
#define RAMABLE_REGION ram :ram_phdr
2929
#define ROMABLE_REGION ram :ram_phdr
30-
#define LPRAM_REGION lpram
30+
#define LP_SRAM_REGION lpram
3131

3232
MEMORY
3333
{
@@ -103,8 +103,8 @@ MEMORY
103103
len = IDT_SIZE
104104
#endif
105105
lpram :
106-
org = LPRAM_BASE,
107-
len = LPRAM_SIZE
106+
org = LP_SRAM_BASE,
107+
len = LP_SRAM_SIZE
108108

109109
static_uuid_entries_seg (!ari) :
110110
org = UUID_ENTRY_ELF_BASE,
@@ -474,7 +474,7 @@ SECTIONS
474474
_dma_buf_start = ABSOLUTE(.);
475475
*(.dma_buffers)
476476
_dma_buf_end = ABSOLUTE(.);
477-
} >LPRAM_REGION
477+
} >LP_SRAM_REGION
478478
_heap_sentry = L2_SRAM_BASE + L2_SRAM_SIZE;
479479
.comment 0 : { *(.comment) }
480480
.debug 0 : { *(.debug) }

‎soc/xtensa/intel_adsp/cavs_v20/include/soc/memory.h‎

Lines changed: 4 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -89,10 +89,6 @@
8989
/* size of the Interrupt Descriptor Table (IDT) */
9090
#define IDT_SIZE 0x2000
9191

92-
/* low power ram where DMA buffers are typically placed */
93-
#define LPRAM_BASE (DT_REG_ADDR(DT_NODELABEL(sram1)))
94-
#define LPRAM_SIZE (DT_REG_SIZE(DT_NODELABEL(sram1)))
95-
9692
/* bootloader */
9793

9894
#define HP_SRAM_BASE 0xbe000000
@@ -221,4 +217,8 @@
221217

222218
#define SRAM_BANK_SIZE (64 * 1024)
223219

220+
/* low power ram where DMA buffers are typically placed */
221+
#define LP_SRAM_BASE (DT_REG_ADDR(DT_NODELABEL(sram1)))
222+
#define LP_SRAM_SIZE (DT_REG_SIZE(DT_NODELABEL(sram1)))
223+
224224
#endif /* __INC_MEMORY_H */

‎soc/xtensa/intel_adsp/cavs_v20/linker.ld‎

Lines changed: 4 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -27,7 +27,7 @@ PROVIDE(_MemErrorHandler = 0x00000000);
2727

2828
#define RAMABLE_REGION ram :ram_phdr
2929
#define ROMABLE_REGION ram :ram_phdr
30-
#define LPRAM_REGION lpram
30+
#define LP_SRAM_REGION lpram
3131

3232
MEMORY
3333
{
@@ -103,8 +103,8 @@ MEMORY
103103
len = IDT_SIZE
104104
#endif
105105
lpram :
106-
org = LPRAM_BASE,
107-
len = LPRAM_SIZE
106+
org = LP_SRAM_BASE,
107+
len = LP_SRAM_SIZE
108108

109109
static_uuid_entries_seg (!ari) :
110110
org = UUID_ENTRY_ELF_BASE,
@@ -473,7 +473,7 @@ SECTIONS
473473
_dma_buf_start = ABSOLUTE(.);
474474
*(.dma_buffers)
475475
_dma_buf_end = ABSOLUTE(.);
476-
} >LPRAM_REGION
476+
} >LP_SRAM_REGION
477477
_heap_sentry = L2_SRAM_BASE + L2_SRAM_SIZE;
478478
.comment 0 : { *(.comment) }
479479
.debug 0 : { *(.debug) }

‎soc/xtensa/intel_adsp/cavs_v25/include/soc/memory.h‎

Lines changed: 3 additions & 7 deletions
Original file line numberDiff line numberDiff line change
@@ -89,9 +89,6 @@
8989
/* size of the Interrupt Descriptor Table (IDT) */
9090
#define IDT_SIZE 0x2000
9191

92-
/* low power ram where DMA buffers are typically placed */
93-
#define LPRAM_BASE (DT_REG_ADDR(DT_NODELABEL(sram1)))
94-
#define LPRAM_SIZE (DT_REG_SIZE(DT_NODELABEL(sram1)))
9592
#define SRAM_BANK_SIZE (64 * 1024)
9693

9794
/* bootloader */
@@ -220,10 +217,9 @@
220217
/* Host page size */
221218
#define HOST_PAGE_SIZE 4096
222219

223-
/* LP SRAM */
224-
#define LP_SRAM_BASE 0xBE800000
225-
226-
#define LP_SRAM_SIZE (0x10000 * 2)
220+
/* low power RAM where DMA buffers are typically placed, used by linker.ld */
221+
#define LP_SRAM_BASE (DT_REG_ADDR(DT_NODELABEL(sram1)))
222+
#define LP_SRAM_SIZE (DT_REG_SIZE(DT_NODELABEL(sram1)))
227223

228224
/* alternate reset vector */
229225
#define LP_SRAM_ALT_RESET_VEC_BASE LP_SRAM_BASE

‎soc/xtensa/intel_adsp/cavs_v25/linker.ld‎

Lines changed: 5 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -27,7 +27,7 @@ PROVIDE(_MemErrorHandler = 0x00000000);
2727

2828
#define RAMABLE_REGION ram :ram_phdr
2929
#define ROMABLE_REGION ram :ram_phdr
30-
#define LPRAM_REGION lpram
30+
#define LP_SRAM_REGION lpram
3131

3232
MEMORY
3333
{
@@ -103,8 +103,8 @@ MEMORY
103103
len = IDT_SIZE
104104
#endif
105105
lpram :
106-
org = LPRAM_BASE,
107-
len = LPRAM_SIZE
106+
org = LP_SRAM_BASE,
107+
len = LP_SRAM_SIZE
108108

109109
static_uuid_entries_seg (!ari) :
110110
org = UUID_ENTRY_ELF_BASE,
@@ -542,7 +542,8 @@ SECTIONS
542542
_dma_buf_start = ABSOLUTE(.);
543543
*(.dma_buffers)
544544
_dma_buf_end = ABSOLUTE(.);
545-
} >LPRAM_REGION
545+
} >LP_SRAM_REGION
546+
546547
_heap_sentry = L2_SRAM_BASE + L2_SRAM_SIZE;
547548
.comment 0 : { *(.comment) }
548549
.debug 0 : { *(.debug) }

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