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10 | 10 | #if defined(CONFIG_CLOCK_CONTROL_NRF)
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11 | 11 | #include <zephyr/drivers/clock_control/nrf_clock_control.h>
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12 | 12 | #endif
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| 13 | +#include <zephyr/drivers/pinctrl.h> |
13 | 14 | #include <zephyr/drivers/timer/system_timer.h>
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14 | 15 | #include <zephyr/drivers/timer/nrf_grtc_timer.h>
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15 | 16 | #include <nrfx_grtc.h>
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16 | 17 | #include <zephyr/sys/math_extras.h>
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17 | 18 |
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18 | 19 | #define GRTC_NODE DT_NODELABEL(grtc)
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| 20 | +#define HFCLK_NODE DT_PHANDLE_BY_NAME(GRTC_NODE, clocks, hfclock) |
| 21 | +#define LFCLK_NODE DT_PHANDLE_BY_NAME(GRTC_NODE, clocks, lfclock) |
19 | 22 |
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20 | 23 | /* Ensure that GRTC properties in devicetree are defined correctly. */
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21 | 24 | #if !DT_NODE_HAS_PROP(GRTC_NODE, owned_channels)
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49 | 52 |
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50 | 53 | #define MAX_CYCLES (MAX_TICKS * CYC_PER_TICK)
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51 | 54 |
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52 |
| -#define LFCLK_FREQUENCY_HZ 32768 |
| 55 | +#define LFCLK_FREQUENCY_HZ DT_PROP(LFCLK_NODE, clock_frequency) |
53 | 56 |
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54 | 57 | #if defined(CONFIG_TEST)
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55 | 58 | const int32_t z_sys_timer_irq_for_test = DT_IRQN(GRTC_NODE);
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@@ -518,7 +521,35 @@ static int sys_clock_driver_init(void)
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518 | 521 | #if defined(CONFIG_NRF_GRTC_ALWAYS_ON)
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519 | 522 | nrfx_grtc_active_request_set(true);
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520 | 523 | #endif
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| 524 | + |
| 525 | +#if DT_PROP(GRTC_NODE, clkout_32k) |
| 526 | + nrfy_grtc_clkout_set(NRF_GRTC, NRF_GRTC_CLKOUT_32K, true); |
| 527 | +#endif |
| 528 | + |
| 529 | +#if DT_NODE_HAS_PROP(GRTC_NODE, clkout_fast_frequency_hz) |
| 530 | +#if !DT_NODE_HAS_PROP(HFCLK_NODE, clock_frequency) |
| 531 | +#error "hfclock reference required when fast clock output is enabled." |
| 532 | +#endif |
| 533 | + |
| 534 | +#if DT_PROP(GRTC_NODE, clkout_fast_frequency_hz) > (DT_PROP(HFCLK_NODE, clock_frequency) / 2) |
| 535 | +#error "Invalid frequency value for fast clock output." |
| 536 | +#endif |
| 537 | + uint32_t base_frequency = DT_PROP(HFCLK_NODE, clock_frequency); |
| 538 | + uint32_t requested_frequency = DT_PROP(GRTC_NODE, clkout_fast_frequency_hz); |
| 539 | + uint32_t grtc_div = base_frequency / (requested_frequency * 2); |
| 540 | + |
| 541 | + nrfy_grtc_clkout_divider_set(NRF_GRTC, (uint8_t)grtc_div); |
| 542 | + nrfy_grtc_clkout_set(NRF_GRTC, NRF_GRTC_CLKOUT_FAST, true); |
| 543 | +#endif |
| 544 | + |
| 545 | +#if DT_PROP(GRTC_NODE, clkout_32k) || DT_NODE_HAS_PROP(GRTC_NODE, clkout_fast_frequency_hz) |
| 546 | + PINCTRL_DT_DEFINE(GRTC_NODE); |
| 547 | + const struct pinctrl_dev_config *pcfg = PINCTRL_DT_DEV_CONFIG_GET(GRTC_NODE); |
| 548 | + |
| 549 | + return pinctrl_apply_state(pcfg, PINCTRL_STATE_DEFAULT); |
| 550 | +#else |
521 | 551 | return 0;
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| 552 | +#endif |
522 | 553 | }
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523 | 554 |
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524 | 555 | void sys_clock_set_timeout(int32_t ticks, bool idle)
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