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arch: microblaze: add MicroBlaze arch headers
Internal references: FWRIVERHD-4554 Signed-off-by: Alp Sayin <[email protected]>
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‎arch/microblaze/include/kernel_arch_data.h‎

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/*
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* Copyright (c) 2023 Advanced Micro Devices, Inc. (AMD)
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* Copyright (c) 2023 Alp Sayin <[email protected]>
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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/**
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* @file
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* @brief Private kernel definitions
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*
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* This file contains private kernel structures definitions and various
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* other definitions for the MIPS processor architecture.
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*/
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#ifndef ZEPHYR_ARCH_MICROBLAZE_INCLUDE_KERNEL_ARCH_DATA_H_
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#define ZEPHYR_ARCH_MICROBLAZE_INCLUDE_KERNEL_ARCH_DATA_H_
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#include <zephyr/arch/cpu.h>
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#include <zephyr/toolchain.h>
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#ifndef _ASMLANGUAGE
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#include <zephyr/kernel.h>
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#include <zephyr/sys/dlist.h>
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#include <zephyr/sys/util.h>
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#include <zephyr/types.h>
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#ifdef __cplusplus
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extern "C" {
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#endif
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#ifdef __cplusplus
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}
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#endif
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#endif /* _ASMLANGUAGE */
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#endif /* ZEPHYR_ARCH_MICROBLAZE_INCLUDE_KERNEL_ARCH_DATA_H_ */

‎arch/microblaze/include/kernel_arch_func.h‎

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/*
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* Copyright (c) 2023 Advanced Micro Devices, Inc. (AMD)
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* Copyright (c) 2023 Alp Sayin <[email protected]>
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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/**
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* @file
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* @brief Private kernel definitions
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*
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* This file contains private kernel function/macro definitions and various
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* other definitions for the MIPS processor architecture.
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*/
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#ifndef ZEPHYR_ARCH_MICROBLAZE_INCLUDE_KERNEL_ARCH_FUNC_H_
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#define ZEPHYR_ARCH_MICROBLAZE_INCLUDE_KERNEL_ARCH_FUNC_H_
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#include <kernel_arch_data.h>
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#ifdef __cplusplus
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extern "C" {
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#endif
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#ifndef _ASMLANGUAGE
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static ALWAYS_INLINE void arch_kernel_init(void)
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{
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}
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static ALWAYS_INLINE void arch_thread_return_value_set(struct k_thread *thread, unsigned int value)
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{
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thread->callee_saved.retval = value;
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}
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FUNC_NORETURN void z_microblaze_fatal_error(unsigned int reason, const z_arch_esf_t *esf);
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static inline bool arch_is_in_isr(void)
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{
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return _kernel.cpus[0].nested != 0U;
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}
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#ifdef CONFIG_IRQ_OFFLOAD
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void z_irq_do_offload(void);
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#endif
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#endif /* _ASMLANGUAGE */
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#ifdef __cplusplus
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}
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#endif
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#endif /* ZEPHYR_ARCH_MICROBLAZE_INCLUDE_KERNEL_ARCH_FUNC_H_ */

‎include/zephyr/arch/microblaze/arch.h‎

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/*
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* Copyright (c) 2023 Advanced Micro Devices, Inc. (AMD)
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* Copyright (c) 2023 Alp Sayin <[email protected]>
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#ifndef ZEPHYR_INCLUDE_ARCH_MICROBLAZE_ARCH_H_
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#define ZEPHYR_INCLUDE_ARCH_MICROBLAZE_ARCH_H_
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#include <zephyr/arch/common/ffs.h>
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#include <zephyr/arch/microblaze/exp.h>
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#include <zephyr/arch/microblaze/sys_bitops.h>
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#include <zephyr/arch/microblaze/sys_io.h>
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#include <zephyr/arch/microblaze/thread.h>
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#include <zephyr/devicetree.h>
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#include <zephyr/irq.h>
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#include <zephyr/sw_isr_table.h>
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#include <microblaze/emulate_isr.h>
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#include <microblaze/mb_interface.h>
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#include <microblaze/microblaze_asm.h>
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#include <microblaze/microblaze_regs.h>
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#define ARCH_STACK_PTR_ALIGN 16
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#ifndef _ASMLANGUAGE
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#include <zephyr/sys/util.h>
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#ifdef __cplusplus
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extern "C" {
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#endif
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#define STACK_ROUND_UP(x) ROUND_UP(x, ARCH_STACK_PTR_ALIGN)
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uint32_t arch_irq_pending(void);
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void arch_irq_enable(unsigned int irq);
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void arch_irq_disable(unsigned int irq);
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int arch_irq_is_enabled(unsigned int irq);
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uint32_t arch_irq_set_emulated_pending(uint32_t irq);
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uint32_t arch_irq_pending_vector(uint32_t irq_pending);
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void z_irq_spurious(const void *unused);
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/**
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* Normally used to configure a static interrupt.
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* Barebones microblaze has 1 interrupt to offer so we connect
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* whatever isr & param supplied to that. SoCs should use this
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* macro to connect a single device (can be the AXI interrupt controller)
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* to the microblaze's only ISR to eventually make it call XIntc_DeviceInterruptHandler.
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*
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* @param irq_p IRQ line number
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* @param priority_p Interrupt priority
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* @param isr_p Interrupt service routine
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* @param isr_param_p ISR parameter
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* @param flags_p IRQ options
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*
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* @return The vector assigned to this interrupt
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*/
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#define ARCH_IRQ_CONNECT(irq_p, priority_p, isr_p, isr_param_p, flags_p) \
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{ \
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Z_ISR_DECLARE(irq_p, 0, isr_p, isr_param_p); \
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}
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static ALWAYS_INLINE unsigned int arch_irq_lock(void)
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{
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const uint32_t unshifted_msr_ie_status = mfmsr() & MSR_IE_MASK;
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if (unshifted_msr_ie_status) {
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extern void microblaze_disable_interrupts(void);
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microblaze_disable_interrupts();
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return 1;
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}
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return 0;
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}
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static ALWAYS_INLINE void arch_irq_unlock(unsigned int key)
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{
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if (key) {
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extern void microblaze_enable_interrupts(void);
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microblaze_enable_interrupts();
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}
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}
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static ALWAYS_INLINE bool arch_irq_unlocked(unsigned int key)
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{
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return key != 0;
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}
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static ALWAYS_INLINE void arch_nop(void)
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{
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__asm__ volatile("nop");
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}
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extern uint32_t sys_clock_cycle_get_32(void);
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static inline uint32_t arch_k_cycle_get_32(void)
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{
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return sys_clock_cycle_get_32();
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}
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extern uint64_t sys_clock_cycle_get_64(void);
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static inline uint64_t arch_k_cycle_get_64(void)
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{
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return sys_clock_cycle_get_64();
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}
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#ifdef __cplusplus
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}
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#endif
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#endif /* _ASMLANGUAGE */
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#endif /* ZEPHYR_INCLUDE_ARCH_MICROBLAZE_ARCH_H_ */

‎include/zephyr/arch/microblaze/arch_inlines.h‎

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/*
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* Copyright (c) 2023 Advanced Micro Devices, Inc. (AMD)
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* Copyright (c) 2023 Alp Sayin <[email protected]>
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#ifndef ZEPHYR_INCLUDE_ARCH_MICROBLAZE_ARCH_INLINES_H
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#define ZEPHYR_INCLUDE_ARCH_MICROBLAZE_ARCH_INLINES_H
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#include <zephyr/kernel_structs.h>
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#include <zephyr/devicetree.h>
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#define _CPU DT_PATH(cpus, cpu_0)
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static ALWAYS_INLINE unsigned int arch_num_cpus(void)
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{
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return CONFIG_MP_MAX_NUM_CPUS;
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}
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static inline uint32_t arch_get_cpu_clock_frequency(void)
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{
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return DT_PROP_OR(_CPU, clock_frequency, 0);
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}
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#endif /* ZEPHYR_INCLUDE_ARCH_MICROBLAZE_ARCH_INLINES_H */

‎include/zephyr/arch/microblaze/sys_bitops.h‎

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/*
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* Copyright (c) 2023 Advanced Micro Devices, Inc. (AMD)
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* Copyright (c) 2023 Alp Sayin <[email protected]>
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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/* Memory bits manipulation functions in non-arch-specific C code */
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#ifndef ZEPHYR_INCLUDE_ARCH_MICROBLAZE_SYS_BITOPS_H_
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#define ZEPHYR_INCLUDE_ARCH_MICROBLAZE_SYS_BITOPS_H_
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#ifndef _ASMLANGUAGE
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#include <zephyr/sys/sys_io.h>
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#include <zephyr/toolchain.h>
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#include <zephyr/types.h>
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#ifdef __cplusplus
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extern "C" {
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#endif
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static ALWAYS_INLINE void sys_set_bit(mem_addr_t addr, unsigned int bit)
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{
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compiler_barrier();
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uint32_t temp = *(volatile uint32_t *)addr;
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*(volatile uint32_t *)addr = temp | (1 << bit);
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compiler_barrier();
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}
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static ALWAYS_INLINE void sys_clear_bit(mem_addr_t addr, unsigned int bit)
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{
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compiler_barrier();
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uint32_t temp = *(volatile uint32_t *)addr;
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*(volatile uint32_t *)addr = temp & ~(1 << bit);
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compiler_barrier();
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}
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static ALWAYS_INLINE int sys_test_bit(mem_addr_t addr, unsigned int bit)
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{
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uint32_t temp;
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compiler_barrier();
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temp = *(volatile uint32_t *)addr;
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compiler_barrier();
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return temp & (1 << bit);
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}
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static ALWAYS_INLINE void sys_set_bits(mem_addr_t addr, unsigned int mask)
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{
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compiler_barrier();
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uint32_t temp = *(volatile uint32_t *)addr;
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*(volatile uint32_t *)addr = temp | mask;
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compiler_barrier();
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}
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static ALWAYS_INLINE void sys_clear_bits(mem_addr_t addr, unsigned int mask)
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{
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compiler_barrier();
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uint32_t temp = *(volatile uint32_t *)addr;
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*(volatile uint32_t *)addr = temp & ~mask;
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compiler_barrier();
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}
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static ALWAYS_INLINE void sys_bitfield_set_bit(mem_addr_t addr, unsigned int bit)
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{
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/* Doing memory offsets in terms of 32-bit values to prevent
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* alignment issues
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*/
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sys_set_bit(addr + ((bit >> 5) << 2), bit & 0x1F);
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}
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static ALWAYS_INLINE void sys_bitfield_clear_bit(mem_addr_t addr, unsigned int bit)
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{
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sys_clear_bit(addr + ((bit >> 5) << 2), bit & 0x1F);
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}
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static ALWAYS_INLINE int sys_bitfield_test_bit(mem_addr_t addr, unsigned int bit)
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{
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return sys_test_bit(addr + ((bit >> 5) << 2), bit & 0x1F);
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}
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static ALWAYS_INLINE int sys_test_and_set_bit(mem_addr_t addr, unsigned int bit)
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{
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int ret;
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ret = sys_test_bit(addr, bit);
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sys_set_bit(addr, bit);
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return ret;
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}
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static ALWAYS_INLINE int sys_test_and_clear_bit(mem_addr_t addr, unsigned int bit)
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{
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int ret;
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ret = sys_test_bit(addr, bit);
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sys_clear_bit(addr, bit);
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return ret;
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}
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static ALWAYS_INLINE int sys_bitfield_test_and_set_bit(mem_addr_t addr, unsigned int bit)
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{
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int ret;
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ret = sys_bitfield_test_bit(addr, bit);
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sys_bitfield_set_bit(addr, bit);
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return ret;
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}
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static ALWAYS_INLINE int sys_bitfield_test_and_clear_bit(mem_addr_t addr, unsigned int bit)
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{
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int ret;
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ret = sys_bitfield_test_bit(addr, bit);
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sys_bitfield_clear_bit(addr, bit);
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return ret;
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}
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#ifdef __cplusplus
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}
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#endif
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#endif /* _ASMLANGUAGE */
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#endif /* ZEPHYR_INCLUDE_ARCH_MICROBLAZE_SYS_BITOPS_H_ */

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