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dts: arm: Introduce gigadevice soc bindings
Add gigadevice soc initial version. Signed-off-by: Gerson Fernando Budke <[email protected]>
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dts/arm/gigadevice/gd32f403.dtsi

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/*
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* Copyright (c) 2021, ATL Electronics
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include <arm/armv7-m.dtsi>
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/ {
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cpus {
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#address-cells = <1>;
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#size-cells = <0>;
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cpu0: cpu@0 {
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device_type = "cpu";
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compatible = "arm,cortex-m4f";
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reg = <0>;
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#address-cells = <1>;
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#size-cells = <1>;
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mpu: mpu@e000ed90 {
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compatible = "arm,armv7m-mpu";
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reg = <0xe000ed90 0x40>;
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arm,num-mpu-regions = <8>;
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};
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};
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};
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soc {
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sram0: memory@20000000 {
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compatible = "mmio-sram";
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};
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fmc: flash-controller@40022000 {
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compatible = "gd,gd32-flash-controller";
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label = "FLASH_CTRL";
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reg = <0x40022000 0x400>;
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peripheral-id = <6>;
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#address-cells = <1>;
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#size-cells = <1>;
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flash0: flash@8000000 {
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compatible = "soc-nv-flash";
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label = "FLASH_0";
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};
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};
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};
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};
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&nvic {
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arm,num-irq-priority-bits = <4>;
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};
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/*
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* Copyright (c) 2021 ATL Electronics
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include <mem.h>
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#include <gigadevice/gd32f403.dtsi>
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/ {
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soc {
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flash-controller@40022000 {
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flash0: flash@8000000 {
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reg = <0x08000000 DT_SIZE_K(512)>;
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};
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};
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sram0: memory@20000000 {
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reg = <0x20000000 DT_SIZE_K(96)>;
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};
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};
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};

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