@@ -62,27 +62,29 @@ static int siwx91x_transfer_direction(uint32_t dir)
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return - EINVAL ;
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}
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- static int siwx91x_data_width (uint32_t data_width )
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+ static bool siwx91x_is_data_width_valid (uint32_t data_width )
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{
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switch (data_width ) {
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case 1 :
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- return SRC_SIZE_8 ;
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case 2 :
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- return SRC_SIZE_16 ;
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case 4 :
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- return SRC_SIZE_32 ;
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+ return true ;
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default :
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- return - EINVAL ;
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+ return false ;
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}
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}
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- static bool siwx91x_is_burst_length_valid (uint32_t blen )
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+ static int siwx91x_burst_length (uint32_t blen )
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{
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- switch (blen / 8 ) {
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+ switch (blen ) {
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case 1 :
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- return true; /* 8-bit burst */
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+ return SRC_INC_8 ;
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+ case 2 :
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+ return SRC_INC_16 ;
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+ case 4 :
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+ return SRC_INC_32 ;
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default :
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- return false ;
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+ return - EINVAL ;
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}
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}
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@@ -101,7 +103,7 @@ static int siwx91x_addr_adjustment(uint32_t adjustment)
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static int siwx91x_channel_config (const struct device * dev , RSI_UDMA_HANDLE_T udma_handle ,
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uint32_t channel , const struct dma_config * config )
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{
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- uint32_t dma_transfer_num = config -> head_block -> block_size / config -> source_data_size ;
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+ uint32_t dma_transfer_num = config -> head_block -> block_size / config -> source_burst_length ;
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const struct dma_siwx91x_config * cfg = dev -> config ;
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struct dma_siwx91x_data * data = dev -> data ;
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UDMA_RESOURCES udma_resources = {
@@ -140,30 +142,30 @@ static int siwx91x_channel_config(const struct device *dev, RSI_UDMA_HANDLE_T ud
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channel_control .totalNumOfDMATrans = dma_transfer_num ;
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}
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- if (siwx91x_data_width (config -> source_data_size ) < 0 ||
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- siwx91x_data_width (config -> dest_data_size ) < 0 ) {
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+ if (! siwx91x_is_data_width_valid (config -> source_data_size ) ||
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+ ! siwx91x_is_data_width_valid (config -> dest_data_size )) {
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return - EINVAL ;
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}
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- if (siwx91x_is_burst_length_valid (config -> source_burst_length ) == false ||
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- siwx91x_is_burst_length_valid (config -> dest_burst_length ) == false ) {
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+ if (siwx91x_burst_length (config -> source_burst_length ) < 0 ||
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+ siwx91x_burst_length (config -> dest_burst_length ) < 0 ) {
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return - EINVAL ;
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}
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- channel_control .srcSize = siwx91x_data_width (config -> source_data_size );
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- channel_control .dstSize = siwx91x_data_width (config -> dest_data_size );
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+ channel_control .srcSize = siwx91x_burst_length (config -> source_burst_length );
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+ channel_control .dstSize = siwx91x_burst_length (config -> dest_burst_length );
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if (siwx91x_addr_adjustment (config -> head_block -> source_addr_adj ) < 0 ||
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siwx91x_addr_adjustment (config -> head_block -> dest_addr_adj ) < 0 ) {
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return - EINVAL ;
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}
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if (siwx91x_addr_adjustment (config -> head_block -> source_addr_adj ) == 0 ) {
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- channel_control .srcInc = channel_control . srcSize ;
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+ channel_control .srcInc = siwx91x_burst_length ( config -> source_burst_length ) ;
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} else {
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channel_control .srcInc = UDMA_SRC_INC_NONE ;
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}
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if (siwx91x_addr_adjustment (config -> head_block -> dest_addr_adj ) == 0 ) {
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- channel_control .dstInc = channel_control . dstSize ;
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+ channel_control .dstInc = siwx91x_burst_length ( config -> dest_burst_length ) ;
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} else {
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channel_control .dstInc = UDMA_DST_INC_NONE ;
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}
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