tests: nmi: Add NMI registration API test

Test that NMI registration works as expected.

Signed-off-by: Andrei Emeltchenko <[email protected]>

Author: finikorg

tests/arch/x86/nmi/CMakeLists.txt

@@ -0,0 +1,15 @@
+# SPDX-License-Identifier: Apache-2.0
+
+cmake_minimum_required(VERSION 3.13.1)
+find_package(Zephyr REQUIRED HINTS $ENV{ZEPHYR_BASE})
+project(nmi)
+
+enable_language(C ASM)
+
+FILE(GLOB app_sources src/*.c)
+target_sources(app PRIVATE ${app_sources})
+
+target_include_directories(app PRIVATE
+  ${ZEPHYR_BASE}/kernel/include
+  ${ZEPHYR_BASE}/arch/${ARCH}/include
+  )

tests/arch/x86/nmi/README.txt

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+Title: NMI registration support
+
+Description:
+
+This test verifies that NMI registration works as expected.
+
+--------------------------------------------------------------------------------
+
+Building and Running Project:
+
+This project outputs to the console.  It can be built and executed
+on QEMU as follows:
+
+    make run
+
+Sample output is:
+
+Booting from ROM..*** Booting Zephyr OS build v2.4.0-rc1-197-g77a5f92715f7  ***
+Running test suite nmi
+===================================================================
+START - test_nmi_handler
+Testing to see interrupt handler executes properly
+ PASS - test_nmi_handler
+===================================================================
+Test suite nmi succeeded
+===================================================================
+PROJECT EXECUTION SUCCESSFUL

tests/arch/x86/nmi/prj.conf

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+CONFIG_ZTEST=y

tests/arch/x86/nmi/src/main.c

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+/*
+ * Copyright (c) 2020 Intel Corporation
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#include <zephyr.h>
+#include <ztest.h>
+#include <tc_util.h>
+
+#include <kernel_internal.h>
+#if defined(__GNUC__)
+#include "test_asm_inline_gcc.h"
+#else
+#include "test_asm_inline_other.h"
+#endif
+
+static volatile int int_handler_executed;
+
+bool z_x86_do_kernel_nmi(const z_arch_esf_t *esf)
+{
+	int_handler_executed++;
+
+	return true;
+}
+
+void test_nmi_handler(void)
+{
+	TC_PRINT("Testing to see interrupt handler executes properly\n");
+
+	_trigger_isr_handler(IV_NON_MASKABLE_INTERRUPT);
+
+	zassert_not_equal(int_handler_executed, 0,
+			  "Interrupt handler did not execute");
+	zassert_equal(int_handler_executed, 1,
+		      "Interrupt handler executed more than once! (%d)\n",
+		      int_handler_executed);
+}
+
+void test_main(void)
+{
+	ztest_test_suite(nmi, ztest_unit_test(test_nmi_handler));
+	ztest_run_test_suite(nmi);
+}

tests/arch/x86/nmi/src/test_asm_inline_gcc.h

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+/* Intel x86 GCC specific test inline assembler functions and macros */
+
+/*
+ * Copyright (c) 2015, Wind River Systems, Inc.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#ifndef _TEST_ASM_INLINE_GCC_H
+#define _TEST_ASM_INLINE_GCC_H
+
+#if !defined(__GNUC__) || !defined(CONFIG_X86)
+#error test_asm_inline_gcc.h goes only with x86 GCC
+#endif
+
+#define _trigger_isr_handler(irq) __asm__ volatile("int %0" : : "i" (irq) : "memory")
+
+#endif /* _TEST_ASM_INLINE_GCC_H */

tests/arch/x86/nmi/testcase.yaml

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+tests:
+  arch.interrupt.nmi:
+    arch_allow: x86
+    platform_allow: qemu_x86_64
+    tags: interrupt