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YuguoWHMaureenHelm
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soc: arc: fix ARC_HAS_ACCL_REGS settings
ARC_HAS_ACCL_REGS should set to y to protect ACCL and ACCH registers during irq. These registers could be used as GPRs by compilers and therefore need store/restore during irq. Signed-off-by: Yuguo Zou <[email protected]>
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arch/arc/Kconfig

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@@ -263,7 +263,6 @@ config CODE_DENSITY
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config ARC_HAS_ACCL_REGS
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bool "Reg Pair ACCL:ACCH (FPU and/or MPY > 6)"
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default y if CPU_HS3X
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default y if FPU
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help
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Depending on the configuration, CPU can contain accumulator reg-pair
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(also referred to as r58:r59). These can also be used by gcc as GPR so

soc/arc/snps_arc_hsdk/Kconfig.defconfig

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@@ -47,4 +47,7 @@ config UART_NS16550_ACCESS_WORD_ONLY
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default y
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depends on UART_NS16550
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config ARC_HAS_ACCL_REGS
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default y
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endif # ARC_HSDK

soc/arc/snps_nsim/Kconfig.defconfig.em

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@@ -50,4 +50,7 @@ config ZTEST_STACKSIZE
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endif # ARC_MPU_VER
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config ARC_HAS_ACCL_REGS
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default y
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endif # SOC_NSIM_EM

soc/arc/snps_nsim/Kconfig.defconfig.em7d_v22

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@@ -47,4 +47,7 @@ config ZTEST_STACKSIZE
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endif # ARC_MPU_VER
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config ARC_HAS_ACCL_REGS
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default y
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endif # SOC_NSIM_EM

soc/arc/snps_nsim/Kconfig.defconfig.hs

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@@ -30,4 +30,7 @@ config ARC_FIRQ
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config CACHE_MANAGEMENT
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default y
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config ARC_HAS_ACCL_REGS
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default y
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endif # SOC_NSIM_HS

soc/arc/snps_nsim/Kconfig.defconfig.hs_mpuv6

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@@ -36,4 +36,7 @@ config ARC_FIRQ
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config CACHE_MANAGEMENT
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default y
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config ARC_HAS_ACCL_REGS
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default y
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endif # SOC_NSIM_HS_MPUV6

soc/arc/snps_nsim/Kconfig.defconfig.sem

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@@ -33,4 +33,7 @@ config ARC_FIRQ
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config CACHE_MANAGEMENT
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default y
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config ARC_HAS_ACCL_REGS
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default y
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endif # SOC_NSIM_SEM

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